summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorDiana Picus <diana.picus@linaro.org>2017-08-03 09:14:59 +0000
committerDiana Picus <diana.picus@linaro.org>2017-08-03 09:14:59 +0000
commit930e6ec8f3058fc4dae22da04fb858c63896578e (patch)
tree2ecd73ac8af286b22eee8d9990ece884b30494da /llvm/test
parenta0beedef1c9b677748a0a7f32a05690f9980f164 (diff)
downloadbcm5719-llvm-930e6ec8f3058fc4dae22da04fb858c63896578e.tar.gz
bcm5719-llvm-930e6ec8f3058fc4dae22da04fb858c63896578e.zip
[ARM] GlobalISel: Select simple G_GLOBAL_VALUE instructions
Add support in the instruction selector for G_GLOBAL_VALUE for ELF and MachO for the static relocation model. We don't handle Windows yet because that's Thumb-only, and we don't handle Thumb in general at the moment. Support for PIC, ROPI, RWPI and TLS will be added in subsequent commits. Differential Revision: https://reviews.llvm.org/D35883 llvm-svn: 309927
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select-globals.mir71
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-isel-globals.ll50
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-unsupported.ll39
3 files changed, 159 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select-globals.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select-globals.mir
new file mode 100644
index 00000000000..9cb402df30a
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select-globals.mir
@@ -0,0 +1,71 @@
+# RUN: llc -O0 -mtriple arm-linux -relocation-model=static -mattr=+no-movt -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=CHECK,ELF-NOMOVT
+# RUN: llc -O0 -mtriple arm-linux -relocation-model=static -mattr=-no-movt,+v8m -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=CHECK,ELF-MOVT
+# RUN: llc -O0 -mtriple arm-darwin -relocation-model=static -mattr=+no-movt -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=CHECK,DARWIN-NOMOVT
+# RUN: llc -O0 -mtriple arm-darwin -relocation-model=static -mattr=-no-movt,+v8m -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=CHECK,DARWIN-MOVT
+--- |
+ @internal_global = internal global i32 42
+ define void @test_internal_global() { ret void }
+
+ @external_global = external global i32
+ define void @test_external_global() { ret void }
+...
+---
+name: test_internal_global
+# CHECK-LABEL: name: test_internal_global
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+ - { id: 1, class: gprb }
+# ELF-NOMOVT: constants:
+# ELF-NOMOVT: id: 0
+# ELF-NOMOVT: value: 'i32* @internal_global'
+body: |
+ bb.0:
+ %0(p0) = G_GLOBAL_VALUE @internal_global
+ ; ELF-MOVT: [[G:%[0-9]+]] = MOVi32imm @internal_global
+ ; ELF-NOMOVT: [[G:%[0-9]+]] = LDRi12 %const.0, 0, 14, _ :: (load 4 from constant-pool)
+ ; DARWIN-MOVT: [[G:%[0-9]+]] = MOVi32imm @internal_global
+ ; DARWIN-NOMOVT: [[G:%[0-9]+]] = LDRLIT_ga_abs @internal_global
+
+ %1(s32) = G_LOAD %0(p0) :: (load 4 from @internal_global)
+ ; CHECK: [[V:%[0-9]+]] = LDRi12 [[G]], 0, 14, _
+
+ %r0 = COPY %1(s32)
+ ; CHECK: %r0 = COPY [[V]]
+
+ BX_RET 14, _, implicit %r0
+ ; CHECK: BX_RET 14, _, implicit %r0
+...
+---
+name: test_external_global
+# CHECK-LABEL: name: test_external_global
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+ - { id: 1, class: gprb }
+# ELF-NOMOVT: constants:
+# ELF-NOMOVT: id: 0
+# ELF-NOMOVT: value: 'i32* @external_global'
+body: |
+ bb.0:
+ %0(p0) = G_GLOBAL_VALUE @external_global
+ ; ELF-MOVT: [[G:%[0-9]+]] = MOVi32imm @external_global
+ ; ELF-NOMOVT: [[G:%[0-9]+]] = LDRi12 %const.0, 0, 14, _ :: (load 4 from constant-pool)
+ ; DARWIN-MOVT: [[G:%[0-9]+]] = MOVi32imm @external_global
+ ; DARWIN-NOMOVT: [[G:%[0-9]+]] = LDRLIT_ga_abs @external_global
+
+ %1(s32) = G_LOAD %0(p0) :: (load 4 from @external_global)
+ ; CHECK: [[V:%[0-9]+]] = LDRi12 [[G]], 0, 14, _
+
+ %r0 = COPY %1(s32)
+ ; CHECK: %r0 = COPY [[V]]
+
+ BX_RET 14, _, implicit %r0
+ ; CHECK: BX_RET 14, _, implicit %r0
+...
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-globals.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-globals.ll
new file mode 100644
index 00000000000..745b9a249e7
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-globals.ll
@@ -0,0 +1,50 @@
+; RUN: llc -mtriple armv7-linux -relocation-model=static -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,ELF,ELF-MOVT
+; RUN: llc -mtriple armv7-linux -relocation-model=static -mattr=+no-movt -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,ELF,ELF-NOMOVT
+; RUN: llc -mtriple armv7-darwin -relocation-model=static -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,DARWIN,DARWIN-MOVT
+; RUN: llc -mtriple armv7-darwin -relocation-model=static -mattr=+no-movt -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,DARWIN,DARWIN-NOMOVT
+
+@internal_global = internal global i32 42
+define i32 @test_internal_global() {
+; CHECK-LABEL: test_internal_global:
+; ELF-MOVT: movw r[[ADDR:[0-9]+]], :lower16:internal_global
+; ELF-MOVT-NEXT: movt r[[ADDR]], :upper16:internal_global
+; ELF-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:.L[[:alnum:]_]+]]
+; DARWIN-MOVT: movw r[[ADDR:[0-9]+]], :lower16:_internal_global
+; DARWIN-MOVT-NEXT: movt r[[ADDR]], :upper16:_internal_global
+; DARWIN-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:L[[:alnum:]_]+]]
+; CHECK-NEXT: ldr r0, [r[[ADDR]]]
+; CHECK-NEXT: bx lr
+; ELF-NOMOVT: [[LABEL]]:
+; ELF-NOMOVT-NEXT: .long internal_global
+; DARWIN-NOMOVT: [[LABEL]]:
+; DARWIN-NOMOVT-NEXT: .long _internal_global
+
+entry:
+ %v = load i32, i32* @internal_global
+ ret i32 %v
+}
+
+@external_global = external global i32
+define i32 @test_external_global() {
+; CHECK-LABEL: test_external_global:
+; ELF-MOVT: movw r[[ADDR:[0-9]+]], :lower16:external_global
+; ELF-MOVT-NEXT: movt r[[ADDR]], :upper16:external_global
+; ELF-NOMOVT: ldr r[[ADDR:[0-9]+]], [[CONST_POOL:.L[[:alnum:]_]+]]
+; DARWIN-MOVT: movw r[[ADDR:[0-9]+]], :lower16:_external_global
+; DARWIN-MOVT: movt r[[ADDR]], :upper16:_external_global
+; DARWIN-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:L[[:alnum:]_]+]]
+; CHECK-NEXT: ldr r0, [r[[ADDR]]]
+; CHECK-NEXT: bx lr
+; ELF-NOMOVT: [[CONST_POOL]]:
+; ELF-NOMOVT: .long external_global
+; DARWIN-NOMOVT: [[LABEL]]:
+; DARWIN-NOMOVT: .long _external_global
+entry:
+ %v = load i32, i32* @external_global
+ ret i32 %v
+}
+
+; ELF: internal_global:
+; DARWIN: _internal_global:
+; CHECK: .long 42
+; ELF: .size internal_global, 4
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-unsupported.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-unsupported.ll
index f2f9c5d2a81..3fee2be24ae 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-unsupported.ll
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-unsupported.ll
@@ -1,4 +1,8 @@
-; RUN: llc -mtriple arm-unknown -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2>&1 | FileCheck %s
+; RUN: llc -mtriple arm-unknown -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2>&1 | FileCheck %s -check-prefixes=CHECK
+; RUN: llc -mtriple arm-unknown -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -relocation-model=pic %s -o - 2>&1 | FileCheck %s -check-prefixes=PIC
+; RUN: llc -mtriple arm-unknown -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -relocation-model=ropi %s -o - 2>&1 | FileCheck %s -check-prefixes=ROPI
+; RUN: llc -mtriple arm-unknown -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -relocation-model=rwpi %s -o - 2>&1 | FileCheck %s -check-prefixes=RWPI
+; RUN: llc -mtriple arm-unknown -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -relocation-model=ropi-rwpi %s -o - 2>&1 | FileCheck %s -check-prefixes=ROPI-RWPI
; This file checks that we use the fallback path for things that are known to
; be unsupported on the ARM target. It should progressively shrink in size.
@@ -92,4 +96,37 @@ define i32 @test_thumb(i32 %a) #0 {
ret i32 %a
}
+@thread_local_global = thread_local global i32 42
+
+define i32 @test_thread_local_global() {
+; CHECK: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; CHECK-LABEL: warning: Instruction selection used fallback path for test_thread_local_global
+; PIC: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; PIC-LABEL: warning: Instruction selection used fallback path for test_thread_local_global
+; ROPI: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; ROPI-LABEL: warning: Instruction selection used fallback path for test_thread_local_global
+; RWPI: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; RWPI-LABEL: warning: Instruction selection used fallback path for test_thread_local_global
+; ROPI-RWPI: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; ROPI-RWPI-LABEL: warning: Instruction selection used fallback path for test_thread_local_global
+ %v = load i32, i32* @thread_local_global
+ ret i32 %v
+}
+
+@a_global = external global i32
+
+define i32 @test_global_reloc_models() {
+; This is only unsupported for the PIC, ROPI, RWPI relocation modes.
+; PIC: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; PIC-LABEL: warning: Instruction selection used fallback path for test_global_reloc_models
+; ROPI: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; ROPI-LABEL: warning: Instruction selection used fallback path for test_global_reloc_models
+; RWPI: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; RWPI-LABEL: warning: Instruction selection used fallback path for test_global_reloc_models
+; ROPI-RWPI: remark: {{.*}} cannot select: {{.*}} G_GLOBAL_VALUE
+; ROPI-RWPI-LABEL: warning: Instruction selection used fallback path for test_global_reloc_models
+ %v = load i32, i32* @a_global
+ ret i32 %v
+}
+
attributes #0 = { "target-features"="+thumb-mode" }
OpenPOWER on IntegriCloud