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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-10-01 08:26:55 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-10-01 08:26:55 +0000 |
| commit | 92db6b78f70ee3ca07fee0fc3164d41db12238d0 (patch) | |
| tree | 38a39058e7726dc869a14cb086298d65aab4d9db /llvm/test | |
| parent | 7072a7968f5f32a5ae8d4c971d5893dacbca1d14 (diff) | |
| download | bcm5719-llvm-92db6b78f70ee3ca07fee0fc3164d41db12238d0.tar.gz bcm5719-llvm-92db6b78f70ee3ca07fee0fc3164d41db12238d0.zip | |
[mips] Fix disassembly of [ls][wd]c[23], cache, and pref
Fixes PR21015, and PR20993.
Patch by Jun Koi
llvm-svn: 218745
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips2.txt | 13 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips32.txt | 13 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips64.txt | 6 |
3 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/mips2.txt b/llvm/test/MC/Disassembler/Mips/mips2.txt new file mode 100644 index 00000000000..a604055e62e --- /dev/null +++ b/llvm/test/MC/Disassembler/Mips/mips2.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips2 | FileCheck %s + +# CHECK: sdc3 $5, 9154($6) +0xfc 0xc5 0x23 0xc2 + +# CHECK: swc3 $6, 9158($7) +0xec 0xe6 0x23 0xc6 + +# CHECK: ldc3 $7, 9162($8) +0xdd 0x07 0x23 0xca + +# CHECK: lwc3 $8, 9166($9) +0xcd 0x28 0x23 0xce diff --git a/llvm/test/MC/Disassembler/Mips/mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32.txt index bfb145e3959..bd4ae4daad0 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32.txt @@ -1,4 +1,5 @@ # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s + # CHECK: abs.d $f12, $f14 0x46 0x20 0x73 0x05 @@ -436,3 +437,15 @@ # CHECK: rdhwr $5, $29 # CHECK: .set pop 0x7c 0x05 0xe8 0x3b + +# CHECK: cache 1, 2($3) +0xbc 0x61 0x00 0x02 + +# CHECK: pref 3, 4($2) +0xcc 0x43 0x00 0x04 + +# CHECK: swc2 $9, 9158($7) +0xe8 0xe9 0x23 0xc6 + +# CHECK: lwc2 $8, 9162($6) +0xc8 0xc8 0x23 0xca diff --git a/llvm/test/MC/Disassembler/Mips/mips64.txt b/llvm/test/MC/Disassembler/Mips/mips64.txt index f3d2d100cae..d494df6f9c2 100644 --- a/llvm/test/MC/Disassembler/Mips/mips64.txt +++ b/llvm/test/MC/Disassembler/Mips/mips64.txt @@ -85,3 +85,9 @@ # CHECK: sdxc1 $f8, $4($25) 0x4f 0x24 0x40 0x09 + +# CHECK: sdc2 $9, 9158($7) +0xf8 0xe9 0x23 0xc6 + +# CHECK: ldc2 $3, 9162($8) +0xd9 0x03 0x23 0xca |
