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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-06-26 14:17:58 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-06-26 14:17:58 +0000
commit918e6d70bd2cb6eb2d3d0921badcd3bf9df85b17 (patch)
tree9fadd547cc11e4cf7bc1d013e463ef5ea660649b /llvm/test
parent8c33647ba10cfd1399999154d3c8d9685723f7b7 (diff)
downloadbcm5719-llvm-918e6d70bd2cb6eb2d3d0921badcd3bf9df85b17.tar.gz
bcm5719-llvm-918e6d70bd2cb6eb2d3d0921badcd3bf9df85b17.zip
[Hexagon] Handle cases when the aligned stack pointer is missing
llvm-svn: 306288
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/Hexagon/stack-align-reset.ll51
-rw-r--r--llvm/test/CodeGen/Hexagon/vec-vararg-align.ll30
2 files changed, 81 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/stack-align-reset.ll b/llvm/test/CodeGen/Hexagon/stack-align-reset.ll
new file mode 100644
index 00000000000..0d028fb95b2
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/stack-align-reset.ll
@@ -0,0 +1,51 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+;
+; This used to crash.
+; CHECK: call f1
+
+target triple = "hexagon-unknown--elf"
+
+%struct.0 = type { [5 x i32] }
+%struct.2 = type { i32, i32, i32, %struct.1* }
+%struct.1 = type { i16*, i32, i32, i32 }
+
+@g0 = external hidden unnamed_addr constant [52 x i8], align 1
+@g1 = external hidden unnamed_addr constant [3 x i8], align 1
+
+declare extern_weak void @f0(i32, i8*, i32, i8*, ...) #0
+declare void @f1(%struct.0*, i32) #0
+
+define void @fred(i8* %a0) #0 {
+b1:
+ %v2 = alloca %struct.0, align 4
+ %v3 = alloca %struct.2, i32 undef, align 8
+ br i1 undef, label %b5, label %b4
+
+b4: ; preds = %b1
+ br label %b7
+
+b5: ; preds = %b5, %b1
+ %v6 = getelementptr inbounds %struct.2, %struct.2* %v3, i32 undef, i32 3
+ store %struct.1* undef, %struct.1** %v6, align 4
+ br label %b5
+
+b7: ; preds = %b10, %b4
+ %v8 = call i32 @llvm.hexagon.V6.extractw(<16 x i32> zeroinitializer, i32 0)
+ br i1 icmp eq (void (i32, i8*, i32, i8*, ...)* @f0, void (i32, i8*, i32, i8*, ...)* null), label %b11, label %b9
+
+b9: ; preds = %b7
+ call void (i32, i8*, i32, i8*, ...) @f0(i32 2, i8* getelementptr inbounds ([52 x i8], [52 x i8]* @g0, i32 0, i32 0), i32 2346, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @g1, i32 0, i32 0), i32 %v8)
+ unreachable
+
+b10: ; preds = %b11
+ call void @f1(%struct.0* nonnull %v2, i32 28)
+ br label %b7
+
+b11: ; preds = %b11, %b7
+ br i1 undef, label %b10, label %b11
+}
+
+declare i32 @llvm.hexagon.V6.extractw(<16 x i32>, i32) #1
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" }
+attributes #1 = { nounwind readnone }
diff --git a/llvm/test/CodeGen/Hexagon/vec-vararg-align.ll b/llvm/test/CodeGen/Hexagon/vec-vararg-align.ll
new file mode 100644
index 00000000000..d4c6bd3ef61
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/vec-vararg-align.ll
@@ -0,0 +1,30 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+;
+; Check that the stack is aligned according to the outgoing function arguments.
+; CHECK: r29 = and(r29,#-128)
+
+target triple = "hexagon-unknown--elf"
+
+@.str = private unnamed_addr constant [32 x i8] c"\0AMixed Vectors, Pairs, int flt\0A\00", align 1
+@.str.1 = private unnamed_addr constant [11 x i8] c"\0AVar args\0A\00", align 1
+@gVec0 = common global <16 x i32> zeroinitializer, align 64
+@gVec10 = common global <32 x i32> zeroinitializer, align 128
+@gi1 = common global i32 0, align 4
+@gf1 = common global float 0.000000e+00, align 4
+
+define i32 @main() #0 {
+b0:
+ %v1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i32 0, i32 0)) #0
+ %v2 = load <16 x i32>, <16 x i32>* @gVec0, align 64
+ %v3 = load <32 x i32>, <32 x i32>* @gVec10, align 128
+ %v4 = load i32, i32* @gi1, align 4
+ %v5 = load float, float* @gf1, align 4
+ %v6 = fpext float %v5 to double
+ call void (i8*, i32, ...) @VarVec1(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i32 0, i32 0), i32 4, <16 x i32> %v2, <32 x i32> %v3, i32 %v4, double %v6)
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) #0
+declare void @VarVec1(i8*, i32, ...) #0
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx" }
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