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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-12-05 21:14:51 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-12-05 21:14:51 +0000
commit8eb394d7643e20d7b75225a47a11400ab505439d (patch)
treea89929e2d6f23b7f27cb81f8afcbe8265bf579d8 /llvm/test
parentd8744a7e9f4f8171b50c52f257db8accce290b30 (diff)
downloadbcm5719-llvm-8eb394d7643e20d7b75225a47a11400ab505439d.tar.gz
bcm5719-llvm-8eb394d7643e20d7b75225a47a11400ab505439d.zip
[Hexagon] Add intrinsics for Hexagon V66
llvm-svn: 348413
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/Hexagon/intrinsics-v66.ll45
1 files changed, 45 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/intrinsics-v66.ll b/llvm/test/CodeGen/Hexagon/intrinsics-v66.ll
new file mode 100644
index 00000000000..2732b9cb396
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/intrinsics-v66.ll
@@ -0,0 +1,45 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv66 < %s | FileCheck %s
+
+; CHECK-LABEL: @test1
+; CHECK: r0 -= mpyi(r1,r2)
+define i32 @test1(i32 %rx, i32 %rs, i32 %rt) local_unnamed_addr #0 {
+entry:
+ %v0 = tail call i32 @llvm.hexagon.M2.mnaci(i32 %rx, i32 %rs, i32 %rt)
+ ret i32 %v0
+}
+
+declare i32 @llvm.hexagon.M2.mnaci(i32, i32, i32) #1
+
+; CHECK-LABEL: @test2
+; CHECK: r1:0 = dfadd(r1:0,r3:2)
+define double @test2(double %rss, double %rtt) local_unnamed_addr #0 {
+entry:
+ %v0 = tail call double @llvm.hexagon.F2.dfadd(double %rss, double %rtt)
+ ret double %v0
+}
+
+declare double @llvm.hexagon.F2.dfadd(double, double) #1
+
+; CHECK-LABEL: @test3
+; CHECK: r1:0 = dfsub(r1:0,r3:2)
+define double @test3(double %rss, double %rtt) local_unnamed_addr #0 {
+entry:
+ %v0 = tail call double @llvm.hexagon.F2.dfsub(double %rss, double %rtt)
+ ret double %v0
+}
+
+declare double @llvm.hexagon.F2.dfsub(double, double) #1
+
+; CHECK-LABEL: @test4
+; CHECK: r0 = mask(#1,#2)
+define i32 @test4() local_unnamed_addr #0 {
+entry:
+ %v0 = tail call i32 @llvm.hexagon.S2.mask(i32 1, i32 2)
+ ret i32 %v0
+}
+
+; Function Attrs: nounwind readnone
+declare i32 @llvm.hexagon.S2.mask(i32, i32) #1
+
+attributes #0 = { nounwind readnone "target-cpu"="hexagonv66" "target-features"="-hvx,-long-calls" }
+attributes #1 = { nounwind readnone }
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