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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-08-21 08:58:08 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-08-21 08:58:08 +0000
commit8e92c389e405c0fa5951e35c58eeb20ebb67eba9 (patch)
tree6e0879addc2462d23b2129defcd04cb2b8975575 /llvm/test
parentec12322a282ca7a3c63339d7aaeb50c0d985b072 (diff)
downloadbcm5719-llvm-8e92c389e405c0fa5951e35c58eeb20ebb67eba9.tar.gz
bcm5719-llvm-8e92c389e405c0fa5951e35c58eeb20ebb67eba9.zip
[SystemZ] Add FI[EDX]BRA
These are extensions of the existing FI[EDX]BR instructions, but use a spare bit to suppress inexact conditions. llvm-svn: 188894
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Disassembler/SystemZ/insns.txt54
-rw-r--r--llvm/test/MC/SystemZ/insn-bad-z196.s48
-rw-r--r--llvm/test/MC/SystemZ/insn-bad.s15
-rw-r--r--llvm/test/MC/SystemZ/insn-good-z196.s42
4 files changed, 159 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/SystemZ/insns.txt b/llvm/test/MC/Disassembler/SystemZ/insns.txt
index 15eaf7b43c3..3f4f6c3dd17 100644
--- a/llvm/test/MC/Disassembler/SystemZ/insns.txt
+++ b/llvm/test/MC/Disassembler/SystemZ/insns.txt
@@ -2149,6 +2149,24 @@
# CHECK: fidbr %f15, 0, %f0
0xb3 0x5f 0x00 0xf0
+# CHECK: fidbra %f0, 0, %f0, 1
+0xb3 0x5f 0x01 0x00
+
+# CHECK: fidbra %f0, 0, %f0, 15
+0xb3 0x5f 0x0f 0x00
+
+# CHECK: fidbra %f0, 0, %f15, 1
+0xb3 0x5f 0x01 0x0f
+
+# CHECK: fidbra %f0, 15, %f0, 1
+0xb3 0x5f 0xf1 0x00
+
+# CHECK: fidbra %f4, 5, %f6, 7
+0xb3 0x5f 0x57 0x46
+
+# CHECK: fidbra %f15, 0, %f0, 1
+0xb3 0x5f 0x01 0xf0
+
# CHECK: fiebr %f0, 0, %f0
0xb3 0x57 0x00 0x00
@@ -2164,6 +2182,24 @@
# CHECK: fiebr %f15, 0, %f0
0xb3 0x57 0x00 0xf0
+# CHECK: fiebra %f0, 0, %f0, 1
+0xb3 0x57 0x01 0x00
+
+# CHECK: fiebra %f0, 0, %f0, 15
+0xb3 0x57 0x0f 0x00
+
+# CHECK: fiebra %f0, 0, %f15, 1
+0xb3 0x57 0x01 0x0f
+
+# CHECK: fiebra %f0, 15, %f0, 1
+0xb3 0x57 0xf1 0x00
+
+# CHECK: fiebra %f4, 5, %f6, 7
+0xb3 0x57 0x57 0x46
+
+# CHECK: fiebra %f15, 0, %f0, 1
+0xb3 0x57 0x01 0xf0
+
# CHECK: fixbr %f0, 0, %f0
0xb3 0x47 0x00 0x00
@@ -2179,6 +2215,24 @@
# CHECK: fixbr %f13, 0, %f0
0xb3 0x47 0x00 0xd0
+# CHECK: fixbra %f0, 0, %f0, 1
+0xb3 0x47 0x01 0x00
+
+# CHECK: fixbra %f0, 0, %f0, 15
+0xb3 0x47 0x0f 0x00
+
+# CHECK: fixbra %f0, 0, %f13, 1
+0xb3 0x47 0x01 0x0d
+
+# CHECK: fixbra %f0, 15, %f0, 1
+0xb3 0x47 0xf1 0x00
+
+# CHECK: fixbra %f4, 5, %f8, 9
+0xb3 0x47 0x59 0x48
+
+# CHECK: fixbra %f13, 0, %f0, 1
+0xb3 0x47 0x01 0xd0
+
# CHECK: flogr %r0, %r0
0xb9 0x83 0x00 0x00
diff --git a/llvm/test/MC/SystemZ/insn-bad-z196.s b/llvm/test/MC/SystemZ/insn-bad-z196.s
index ec90c89b4c2..477dac2d269 100644
--- a/llvm/test/MC/SystemZ/insn-bad-z196.s
+++ b/llvm/test/MC/SystemZ/insn-bad-z196.s
@@ -25,6 +25,54 @@
ahik %r0, %r1, foo
#CHECK: error: invalid operand
+#CHECK: fidbra %f0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: fidbra %f0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: fidbra %f0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: fidbra %f0, 16, %f0, 0
+
+ fidbra %f0, 0, %f0, -1
+ fidbra %f0, 0, %f0, 16
+ fidbra %f0, -1, %f0, 0
+ fidbra %f0, 16, %f0, 0
+
+#CHECK: error: invalid operand
+#CHECK: fiebra %f0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: fiebra %f0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: fiebra %f0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: fiebra %f0, 16, %f0, 0
+
+ fiebra %f0, 0, %f0, -1
+ fiebra %f0, 0, %f0, 16
+ fiebra %f0, -1, %f0, 0
+ fiebra %f0, 16, %f0, 0
+
+#CHECK: error: invalid operand
+#CHECK: fixbra %f0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: fixbra %f0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: fixbra %f0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: fixbra %f0, 16, %f0, 0
+#CHECK: error: invalid register pair
+#CHECK: fixbra %f0, 0, %f2, 0
+#CHECK: error: invalid register pair
+#CHECK: fixbra %f2, 0, %f0, 0
+
+ fixbra %f0, 0, %f0, -1
+ fixbra %f0, 0, %f0, 16
+ fixbra %f0, -1, %f0, 0
+ fixbra %f0, 16, %f0, 0
+ fixbra %f0, 0, %f2, 0
+ fixbra %f2, 0, %f0, 0
+
+#CHECK: error: invalid operand
#CHECK: loc %r0,0,-1
#CHECK: error: invalid operand
#CHECK: loc %r0,0,16
diff --git a/llvm/test/MC/SystemZ/insn-bad.s b/llvm/test/MC/SystemZ/insn-bad.s
index 228467004b1..aa3f4c9d83b 100644
--- a/llvm/test/MC/SystemZ/insn-bad.s
+++ b/llvm/test/MC/SystemZ/insn-bad.s
@@ -1142,6 +1142,11 @@
fidbr %f0, -1, %f0
fidbr %f0, 16, %f0
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: fidbra %f0, 0, %f0, 0
+
+ fidbra %f0, 0, %f0, 0
+
#CHECK: error: invalid operand
#CHECK: fiebr %f0, -1, %f0
#CHECK: error: invalid operand
@@ -1150,6 +1155,11 @@
fiebr %f0, -1, %f0
fiebr %f0, 16, %f0
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: fiebra %f0, 0, %f0, 0
+
+ fiebra %f0, 0, %f0, 0
+
#CHECK: error: invalid operand
#CHECK: fixbr %f0, -1, %f0
#CHECK: error: invalid operand
@@ -1164,6 +1174,11 @@
fixbr %f0, 0, %f2
fixbr %f2, 0, %f0
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: fixbra %f0, 0, %f0, 0
+
+ fixbra %f0, 0, %f0, 0
+
#CHECK: error: invalid register pair
#CHECK: flogr %r1, %r0
diff --git a/llvm/test/MC/SystemZ/insn-good-z196.s b/llvm/test/MC/SystemZ/insn-good-z196.s
index 5f7c27785d7..4b12265f730 100644
--- a/llvm/test/MC/SystemZ/insn-good-z196.s
+++ b/llvm/test/MC/SystemZ/insn-good-z196.s
@@ -121,6 +121,48 @@
ark %r15,%r0,%r0
ark %r7,%r8,%r9
+#CHECK: fidbra %f0, 0, %f0, 0 # encoding: [0xb3,0x5f,0x00,0x00]
+#CHECK: fidbra %f0, 0, %f0, 15 # encoding: [0xb3,0x5f,0x0f,0x00]
+#CHECK: fidbra %f0, 0, %f15, 0 # encoding: [0xb3,0x5f,0x00,0x0f]
+#CHECK: fidbra %f0, 15, %f0, 0 # encoding: [0xb3,0x5f,0xf0,0x00]
+#CHECK: fidbra %f4, 5, %f6, 7 # encoding: [0xb3,0x5f,0x57,0x46]
+#CHECK: fidbra %f15, 0, %f0, 0 # encoding: [0xb3,0x5f,0x00,0xf0]
+
+ fidbra %f0, 0, %f0, 0
+ fidbra %f0, 0, %f0, 15
+ fidbra %f0, 0, %f15, 0
+ fidbra %f0, 15, %f0, 0
+ fidbra %f4, 5, %f6, 7
+ fidbra %f15, 0, %f0, 0
+
+#CHECK: fiebra %f0, 0, %f0, 0 # encoding: [0xb3,0x57,0x00,0x00]
+#CHECK: fiebra %f0, 0, %f0, 15 # encoding: [0xb3,0x57,0x0f,0x00]
+#CHECK: fiebra %f0, 0, %f15, 0 # encoding: [0xb3,0x57,0x00,0x0f]
+#CHECK: fiebra %f0, 15, %f0, 0 # encoding: [0xb3,0x57,0xf0,0x00]
+#CHECK: fiebra %f4, 5, %f6, 7 # encoding: [0xb3,0x57,0x57,0x46]
+#CHECK: fiebra %f15, 0, %f0, 0 # encoding: [0xb3,0x57,0x00,0xf0]
+
+ fiebra %f0, 0, %f0, 0
+ fiebra %f0, 0, %f0, 15
+ fiebra %f0, 0, %f15, 0
+ fiebra %f0, 15, %f0, 0
+ fiebra %f4, 5, %f6, 7
+ fiebra %f15, 0, %f0, 0
+
+#CHECK: fixbra %f0, 0, %f0, 0 # encoding: [0xb3,0x47,0x00,0x00]
+#CHECK: fixbra %f0, 0, %f0, 15 # encoding: [0xb3,0x47,0x0f,0x00]
+#CHECK: fixbra %f0, 0, %f13, 0 # encoding: [0xb3,0x47,0x00,0x0d]
+#CHECK: fixbra %f0, 15, %f0, 0 # encoding: [0xb3,0x47,0xf0,0x00]
+#CHECK: fixbra %f4, 5, %f8, 9 # encoding: [0xb3,0x47,0x59,0x48]
+#CHECK: fixbra %f13, 0, %f0, 0 # encoding: [0xb3,0x47,0x00,0xd0]
+
+ fixbra %f0, 0, %f0, 0
+ fixbra %f0, 0, %f0, 15
+ fixbra %f0, 0, %f13, 0
+ fixbra %f0, 15, %f0, 0
+ fixbra %f4, 5, %f8, 9
+ fixbra %f13, 0, %f0, 0
+
#CHECK: loc %r0, 0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf2]
#CHECK: loc %r0, 0, 15 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf2]
#CHECK: loc %r0, -524288, 0 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf2]
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