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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-10-09 18:09:15 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-10-09 18:09:15 +0000 |
| commit | 8dd392e135d9908f3864f3ea4f2ade192099eea7 (patch) | |
| tree | 95bcd00957ca461accd61fa18c9fa5675dd34255 /llvm/test | |
| parent | 4a1a44e3bf1d3dfba1652409f3f7fe0ef1000010 (diff) | |
| download | bcm5719-llvm-8dd392e135d9908f3864f3ea4f2ade192099eea7.tar.gz bcm5719-llvm-8dd392e135d9908f3864f3ea4f2ade192099eea7.zip | |
R600/SI: Legalize INSERT_SUBREG instructions during PostISelFolding
LLVM assumes INSERT_SUBREG will always have register operands, so
we need to legalize non-register operands, like FrameIndexes, to
avoid random assertion failures.
llvm-svn: 219420
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/R600/insert_subreg.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/R600/insert_subreg.ll b/llvm/test/CodeGen/R600/insert_subreg.ll new file mode 100644 index 00000000000..e311e1953cf --- /dev/null +++ b/llvm/test/CodeGen/R600/insert_subreg.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=r600 -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s + +; Test that INSERT_SUBREG instructions don't have non-register operands after +; instruction selection. + +; Make sure this doesn't crash +; CHECK-LABEL: test: +define void @test(i64 addrspace(1)* %out) { +entry: + %tmp0 = alloca [16 x i32] + %tmp1 = ptrtoint [16 x i32]* %tmp0 to i32 + %tmp2 = sext i32 %tmp1 to i64 + store i64 %tmp2, i64 addrspace(1)* %out + ret void +} |
