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authorDiana Picus <diana.picus@linaro.org>2017-11-29 14:20:06 +0000
committerDiana Picus <diana.picus@linaro.org>2017-11-29 14:20:06 +0000
commit863b5b05f18af760f1cd1a13022ec257edc1ab59 (patch)
tree4380d76199b2e380999d14752f711e0f98ea45b7 /llvm/test
parent756348c1c99302023db5124e6b86a6fed5a0f606 (diff)
downloadbcm5719-llvm-863b5b05f18af760f1cd1a13022ec257edc1ab59.tar.gz
bcm5719-llvm-863b5b05f18af760f1cd1a13022ec257edc1ab59.zip
[ARM GlobalISel] Fix selecting G_BRCOND
When lowering a G_BRCOND, we generate a TSTri of the condition against 1, which sets the flags, and then a Bcc which branches based on the value of the flags. Unfortunately, we were using the wrong condition code to check whether we need to branch (EQ instead of NE), which caused all our branches to do the opposite of what they were intended to do. This patch fixes the issue by using the correct condition code. llvm-svn: 319313
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir2
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll2
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
index a54430878be..64773e7ebb1 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
@@ -1171,7 +1171,7 @@ body: |
G_BRCOND %1(s1), %bb.1
; CHECK: TSTri [[COND]], 1, 14, _, implicit-def %cpsr
- ; CHECK: Bcc %bb.1, 0, %cpsr
+ ; CHECK: Bcc %bb.1, 1, %cpsr
G_BR %bb.2
; CHECK: B %bb.2
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
index 50c4e723251..579101e2d2a 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
@@ -442,7 +442,7 @@ define arm_aapcscc void @test_brcond(i32 %n) {
; CHECK: cmp r0
; CHECK-NEXT: movgt [[RCMP:r[0-9]+]], #1
; CHECK: tst [[RCMP]], #1
-; CHECK-NEXT: bne [[FALSE:.L[[:alnum:]_]+]]
+; CHECK-NEXT: beq [[FALSE:.L[[:alnum:]_]+]]
; CHECK: bl brcond1
; CHECK: [[FALSE]]:
; CHECK: bl brcond2
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