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| author | Craig Topper <craig.topper@intel.com> | 2018-01-18 23:52:31 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-18 23:52:31 +0000 |
| commit | 84b26b90d14abc404ff8a4305fbf9ab119f19232 (patch) | |
| tree | 84e444e070c4a0a695d91beebb09ffe3b200cbd8 /llvm/test | |
| parent | 4b7cf1601a3f1a90c2665f2067af72319243af33 (diff) | |
| download | bcm5719-llvm-84b26b90d14abc404ff8a4305fbf9ab119f19232.tar.gz bcm5719-llvm-84b26b90d14abc404ff8a4305fbf9ab119f19232.zip | |
[X86] Add intrinsic support for the RDPID instruction
This adds a new instrinsic to support the rdpid instruction. The implementation is a bit weird because the intrinsic is defined as always returning 32-bits, but the assembler support thinks the instruction produces a 64-bit register in 64-bit mode. But really it zeros the upper 32 bits. So I had to add separate patterns where 64-bit mode uses an extract_subreg.
Differential Revision: https://reviews.llvm.org/D42205
llvm-svn: 322910
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/rdpid.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/rdpid.ll b/llvm/test/CodeGen/X86/rdpid.ll new file mode 100644 index 00000000000..7eafb6cb1ce --- /dev/null +++ b/llvm/test/CodeGen/X86/rdpid.ll @@ -0,0 +1,21 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-- -mattr=rdpid | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64 +; RUN: llc < %s -mtriple=i686-- -mattr=rdpid | FileCheck %s --check-prefix=CHECK --check-prefix=X86 + +define i32 @test_builtin_rdpid() { +; X86-64-LABEL: test_builtin_rdpid: +; X86-64: # %bb.0: +; X86-64-NEXT: rdpid %rax +; X86-64-NEXT: # kill: def %eax killed %eax killed %rax +; X86-64-NEXT: retq +; +; X86-LABEL: test_builtin_rdpid: +; X86: # %bb.0: +; X86-NEXT: rdpid %eax +; X86-NEXT: retl + %1 = tail call i32 @llvm.x86.rdpid() + ret i32 %1 +} + +declare i32 @llvm.x86.rdpid() + |
