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authorSanjay Patel <spatel@rotateright.com>2018-09-21 18:03:49 +0000
committerSanjay Patel <spatel@rotateright.com>2018-09-21 18:03:49 +0000
commit83a1b66c43c1beca1df0df1f703d75425973ce76 (patch)
tree974ba444a88803d69aa75404e00dce2283d4c253 /llvm/test
parentc41985a50e152300de7c63ed4ad209fe91542533 (diff)
downloadbcm5719-llvm-83a1b66c43c1beca1df0df1f703d75425973ce76.tar.gz
bcm5719-llvm-83a1b66c43c1beca1df0df1f703d75425973ce76.zip
[x86] add test with optsize attribute for scalar->vector transform; NFC
llvm-svn: 342755
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/X86/load-scalar-as-vector.ll20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/load-scalar-as-vector.ll b/llvm/test/CodeGen/X86/load-scalar-as-vector.ll
index da7153062ea..e49b5d4f752 100644
--- a/llvm/test/CodeGen/X86/load-scalar-as-vector.ll
+++ b/llvm/test/CodeGen/X86/load-scalar-as-vector.ll
@@ -24,6 +24,26 @@ define <4 x i32> @add_op1_constant(i32* %p) nounwind {
ret <4 x i32> %r
}
+define <4 x i32> @add_op1_constant_optsize(i32* %p) nounwind optsize {
+; SSE-LABEL: add_op1_constant_optsize:
+; SSE: # %bb.0:
+; SSE-NEXT: movl (%rdi), %eax
+; SSE-NEXT: addl $42, %eax
+; SSE-NEXT: movd %eax, %xmm0
+; SSE-NEXT: retq
+;
+; AVX-LABEL: add_op1_constant_optsize:
+; AVX: # %bb.0:
+; AVX-NEXT: movl (%rdi), %eax
+; AVX-NEXT: addl $42, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: retq
+ %x = load i32, i32* %p
+ %b = add i32 %x, 42
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
define <8 x i16> @add_op0_constant(i16* %p) nounwind {
; SSE-LABEL: add_op0_constant:
; SSE: # %bb.0:
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