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| author | czhengsz <czhengsz@cn.ibm.com> | 2019-10-25 04:13:30 -0400 |
|---|---|---|
| committer | czhengsz <czhengsz@cn.ibm.com> | 2019-10-25 04:13:30 -0400 |
| commit | 822059147bf2870d88321824d41c92abb1f671d1 (patch) | |
| tree | 83461863c01b11ed1bac1c23a3d35abecfff3f63 /llvm/test | |
| parent | a6712889f5f1702dfa535718abe400d1a83174c5 (diff) | |
| download | bcm5719-llvm-822059147bf2870d88321824d41c92abb1f671d1.tar.gz bcm5719-llvm-822059147bf2870d88321824d41c92abb1f671d1.zip | |
[PowerPC] [Peephole] fold frame offset by using index form to save add.
renamable $x6 = ADDI8 $x1, -80 ;;; 0 is replaced with -80
renamable $x6 = ADD8 killed renamable $x6, renamable $x5
STW killed renamable $r3, 4, killed renamable $x6 :: (store 4 into %ir.14, !tbaa !2)
After PEI there is a peephole opt opportunity to combine above -80 in ADDI8 with 4 in the STW to eliminate unnecessary ADD8.
Expected result:
renamable $x6 = ADDI8 $x1, -76
STWX killed renamable $r3, renamable $x5, killed renamable $x6 :: (store 4 into %ir.6, !tbaa !2)
Reviewed by: stefanp
Differential Revision: https://reviews.llvm.org/D66329
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir | 52 |
1 files changed, 46 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir b/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir index 3c5c2be935e..b8b9660e3e1 100644 --- a/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir +++ b/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir @@ -18,11 +18,11 @@ body: | bb.0.entry: liveins: $x3, $x1, $x4, $x6 $x3 = ADDI8 $x1, -80 - ; CHECK: $x3 = ADDI8 $x1, -80 + ; CHECK: $x3 = ADDI8 $x1, -76 $x4 = ADD8 killed $x3, killed $x4 - ; CHECK: $x4 = ADD8 killed $x3, killed $x4 + ; CHECK-NOT: ADD8 $x6 = LD 4, killed $x4 - ; CHECK: $x6 = LD 4, killed $x4 + ; CHECK: $x6 = LDX killed $x4, killed $x3 BLR8 implicit $lr8, implicit $rm ... --- @@ -34,11 +34,11 @@ body: | bb.0.entry: liveins: $x3, $x1, $x4, $x6 $x3 = ADDI8 $x1, -80 - ; CHECK: $x3 = ADDI8 $x1, -80 + ; CHECK: $x3 = ADDI8 $x1, -76 $x3 = ADD8 killed $x3, killed $x4 - ; CHECK: $x3 = ADD8 killed $x3, killed $x4 + ; CHECK-NOT: ADD8 $x6 = LD 4, killed $x3 - ; CHECK: $x6 = LD 4, killed $x3 + ; CHECK: $x6 = LDX killed $x4, killed $x3 BLR8 implicit $lr8, implicit $rm ... --- @@ -112,3 +112,43 @@ body: | STD killed $x4, killed $x6, 100 BLR8 implicit $lr8, implicit $rm ... +--- +name: testIndexForm7 +#CHECK : name : testIndexForm7 +# There is other def for ToBeChangedReg between ADD instr and Imm instr +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3, $x1, $x4, $x5, $x6 + $x3 = ADDI8 $x1, -80 + ; CHECK: $x3 = ADDI8 $x1, -80 + $x4 = ADD8 killed $x3, killed $x5 + ; CHECK: $x4 = ADD8 killed $x3, killed $x5 + $x3 = LD 100, $x6 + ; CHECK: $x3 = LD 100, $x6 + STD killed $x3, killed $x6, 200 + ; CHECK: STD killed $x3, killed $x6, 200 + $x6 = LD 4, killed $x4 + ; CHECK: $x6 = LD 4, killed $x4 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testIndexForm8 +#CHECK : name : testIndexForm8 +# There is other def for ScaleReg between ADD instr and Imm instr +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3, $x1, $x4, $x5, $x6 + $x3 = ADDI8 $x1, -80 + ; CHECK: $x3 = ADDI8 $x1, -80 + $x4 = ADD8 killed $x3, killed $x5 + ; CHECK: $x4 = ADD8 killed $x3, killed $x5 + $x5 = LD 100, $x6 + ; CHECK: $x5 = LD 100, $x6 + STD killed $x5, killed $x6, 200 + ; CHECK: STD killed $x5, killed $x6, 200 + $x6 = LD 4, killed $x4 + ; CHECK: $x6 = LD 4, killed $x4 + BLR8 implicit $lr8, implicit $rm +... |

