Push GPRnopc through a large number of instruction definitions to tighten operand decoding.

llvm-svn: 137189

6 files changed, 8 insertions, 14 deletions

diff --git a/llvm/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt
index 0209f03895a..235952fc358 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt
@@ -1,11 +1,10 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=185 Name=MOVTi16 Format=ARM_FORMAT_DPFRM(4)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
 # -------------------------------------------------------------------------------------------------
 # | 1: 1: 1: 0| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
 # -------------------------------------------------------------------------------------------------
-# 
+#
 # if d == 15 then UNPREDICTABLE
 0x00 0xf0 0x41 0xe3
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt
index 4939ebcb198..9e165360525 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-SBFX-arm.txt
@@ -1,8 +1,7 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=271 Name=SBFX Format=ARM_FORMAT_DPFRM(4)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
 # -------------------------------------------------------------------------------------------------
 # | 1: 1: 1: 0| 0: 1: 1: 1| 1: 0: 1: 0| 0: 1: 1: 1| 0: 1: 0: 1| 0: 1: 0: 0| 0: 1: 0: 1| 1: 1: 1: 1|
 # -------------------------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
index e66104676f1..91f3d58b4c4 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
@@ -1,8 +1,7 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=284 Name=SMLAD Format=ARM_FORMAT_MULFRM(1)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
 # -------------------------------------------------------------------------------------------------
 # | 1: 0: 0: 1| 0: 1: 1: 1| 0: 0: 0: 0| 1: 1: 1: 1| 0: 1: 1: 0| 1: 0: 0: 0| 0: 0: 0: 1| 1: 0: 1: 1|
 # -------------------------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-SSAT-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-SSAT-arm.txt
index a02e459eb64..b236f8ef4d2 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-SSAT-arm.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-SSAT-arm.txt
@@ -1,8 +1,7 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=322 Name=SSAT Format=ARM_FORMAT_SATFRM(13)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
 # -------------------------------------------------------------------------------------------------
 # | 1: 1: 1: 0| 0: 1: 1: 0| 1: 0: 1: 0| 0: 0: 0: 0| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 1| 1: 0: 1: 0|
 # -------------------------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
index 4667edb4cae..400d44ce8c3 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
@@ -1,8 +1,7 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=390 Name=SXTBr_rot Format=ARM_FORMAT_EXTFRM(14)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
 # -------------------------------------------------------------------------------------------------
 # | 1: 1: 1: 0| 0: 1: 1: 0| 1: 0: 1: 0| 1: 1: 1: 1| 1: 1: 1: 1| 0: 1: 0: 0| 0: 1: 1: 1| 0: 1: 0: 1|
 # -------------------------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-UQADD8-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-UQADD8-arm.txt
index f4a46b27e83..fb3e71106c9 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-UQADD8-arm.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-UQADD8-arm.txt
@@ -1,12 +1,11 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=426 Name=UQADD8 Format=ARM_FORMAT_DPFRM(4)
-#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
 # -------------------------------------------------------------------------------------------------
 # | 1: 1: 1: 0| 0: 1: 1: 0| 0: 1: 1: 0| 0: 1: 1: 0| 0: 1: 0: 1| 1: 1: 1: 1| 1: 0: 0: 1| 1: 1: 1: 1|
 # -------------------------------------------------------------------------------------------------
-# 
+#
 # DPFrm with bad reg specifier(s)
 #
 # if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;