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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-29 06:25:10 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-29 06:25:10 +0000 |
| commit | 7d1b6c81af232c1a18a3465c0a9524c0d1ac29ef (patch) | |
| tree | f01825958d4980fb7e6f7d97a2f8c1cc0afbc4b8 /llvm/test | |
| parent | 790eb1c4901a7bd2e1d71f12ea0ad92167f3461b (diff) | |
| download | bcm5719-llvm-7d1b6c81af232c1a18a3465c0a9524c0d1ac29ef.tar.gz bcm5719-llvm-7d1b6c81af232c1a18a3465c0a9524c0d1ac29ef.zip | |
AMDGPU: Stop reporting an addressing mode for unknown addrspace
This was being treated the same as private, which has an immediate
offset. For unknown, it probably means it's for a computation not
actually being used for accessing memory, so it should not have a
nontrivial addressing mode.
llvm-svn: 268002
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll b/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll index bd80302a68b..8556bdccc6d 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll @@ -9,10 +9,11 @@ target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24: ; CHECK: bb11: ; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ -2, %entry ] ; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ undef, %entry ] - -; CHECK: bb: ; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1 ; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2 +; CHECK: br i1 + +; CHECK: bb: ; CHECK: %scevgep = getelementptr i8, i8 addrspace(3)* %t, i32 %lsr.iv.next2 ; CHECK: %c1 = icmp ult i8 addrspace(3)* %scevgep, undef define void @local_cmp_user() nounwind { @@ -37,8 +38,13 @@ bb13: } ; CHECK-LABEL: @global_cmp_user( +; CHECK: %lsr.iv1 = phi i64 +; CHECK: %lsr.iv = phi i64 ; CHECK: %lsr.iv.next = add i64 %lsr.iv, -1 ; CHECK: %lsr.iv.next2 = add i64 %lsr.iv1, 2 +; CHECK: br i1 + +; CHECK: bb: ; CHECK: %scevgep = getelementptr i8, i8 addrspace(1)* %t, i64 %lsr.iv.next2 define void @global_cmp_user() nounwind { entry: @@ -62,9 +68,14 @@ bb13: } ; CHECK-LABEL: @global_gep_user( -; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i32 %lsr.iv1 +; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ] +; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ undef, %entry ] ; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1 ; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2 +; CHECK: br i1 + +; CHECK: bb: +; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i32 %lsr.iv1 define void @global_gep_user() nounwind { entry: br label %bb11 @@ -87,9 +98,14 @@ bb13: } ; CHECK-LABEL: @global_sext_scale_user( -; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext +; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ] +; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ undef, %entry ] ; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1 ; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2 +; CHECK: br i1 + +; CHECK: bb +; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext define void @global_sext_scale_user() nounwind { entry: br label %bb11 |
