[AArch64][SVE]: Integer multiply-add/subtract instructions.

This patch adds support for the following instructions:
  MLA  mul-add, writing addend       (Zda = Zda +   Zn * Zm)
  MLS  mul-sub, writing addend       (Zda = Zda +  -Zn * Zm)
  MAD  mul-add, writing multiplicant (Zdn =  Za +  Zdn * Zm)
  MSB  mul-sub, writing multiplicant (Zdn =  Za + -Zdn * Zm)

llvm-svn: 337293

8 files changed, 204 insertions, 0 deletions

diff --git a/llvm/test/MC/AArch64/SVE/mad-diagnostics.s b/llvm/test/MC/AArch64/SVE/mad-diagnostics.s
new file mode 100644
index 00000000000..e320933605f
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mad-diagnostics.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+mad z0.h, p8/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: mad z0.h, p8/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+mad z0.s, p7/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: mad z0.s, p7/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/mad.s b/llvm/test/MC/AArch64/SVE/mad.s
new file mode 100644
index 00000000000..3a5d81e3261
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mad.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+mad z0.b, p7/m, z1.b, z31.b
+// CHECK-INST: mad	z0.b, p7/m, z1.b, z31.b
+// CHECK-ENCODING: [0xe0,0xdf,0x01,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 df 01 04 <unknown>
+
+mad z0.h, p7/m, z1.h, z31.h
+// CHECK-INST: mad	z0.h, p7/m, z1.h, z31.h
+// CHECK-ENCODING: [0xe0,0xdf,0x41,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 df 41 04 <unknown>
+
+mad z0.s, p7/m, z1.s, z31.s
+// CHECK-INST: mad	z0.s, p7/m, z1.s, z31.s
+// CHECK-ENCODING: [0xe0,0xdf,0x81,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 df 81 04 <unknown>
+
+mad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mad	z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 df c1 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/mla-diagnostics.s b/llvm/test/MC/AArch64/SVE/mla-diagnostics.s
new file mode 100644
index 00000000000..03cb471ba25
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mla-diagnostics.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+mla z0.h, p8/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: mla z0.h, p8/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+mla z0.s, p7/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: mla z0.s, p7/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/mla.s b/llvm/test/MC/AArch64/SVE/mla.s
new file mode 100644
index 00000000000..4911e6afd92
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mla.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+mla z0.b, p7/m, z1.b, z31.b
+// CHECK-INST: mla	z0.b, p7/m, z1.b, z31.b
+// CHECK-ENCODING: [0x20,0x5c,0x1f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c 1f 04 <unknown>
+
+mla z0.h, p7/m, z1.h, z31.h
+// CHECK-INST: mla	z0.h, p7/m, z1.h, z31.h
+// CHECK-ENCODING: [0x20,0x5c,0x5f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c 5f 04 <unknown>
+
+mla z0.s, p7/m, z1.s, z31.s
+// CHECK-INST: mla	z0.s, p7/m, z1.s, z31.s
+// CHECK-ENCODING: [0x20,0x5c,0x9f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c 9f 04 <unknown>
+
+mla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mla	z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x5c,0xdf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c df 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/mls-diagnostics.s b/llvm/test/MC/AArch64/SVE/mls-diagnostics.s
new file mode 100644
index 00000000000..711518c5f49
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mls-diagnostics.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+mls z0.h, p8/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: mls z0.h, p8/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+mls z0.s, p7/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: mls z0.s, p7/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/mls.s b/llvm/test/MC/AArch64/SVE/mls.s
new file mode 100644
index 00000000000..8c088fdd98b
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mls.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+mls z0.b, p7/m, z1.b, z31.b
+// CHECK-INST: mls	z0.b, p7/m, z1.b, z31.b
+// CHECK-ENCODING: [0x20,0x7c,0x1f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c 1f 04 <unknown>
+
+mls z0.h, p7/m, z1.h, z31.h
+// CHECK-INST: mls	z0.h, p7/m, z1.h, z31.h
+// CHECK-ENCODING: [0x20,0x7c,0x5f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c 5f 04 <unknown>
+
+mls z0.s, p7/m, z1.s, z31.s
+// CHECK-INST: mls	z0.s, p7/m, z1.s, z31.s
+// CHECK-ENCODING: [0x20,0x7c,0x9f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c 9f 04 <unknown>
+
+mls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mls	z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x7c,0xdf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c df 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/msb-diagnostics.s b/llvm/test/MC/AArch64/SVE/msb-diagnostics.s
new file mode 100644
index 00000000000..a2bde879683
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/msb-diagnostics.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+msb z0.h, p8/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: msb z0.h, p8/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+msb z0.s, p7/m, z1.h, z2.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: msb z0.s, p7/m, z1.h, z2.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/msb.s b/llvm/test/MC/AArch64/SVE/msb.s
new file mode 100644
index 00000000000..048f32160e1
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/msb.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+msb z0.b, p7/m, z1.b, z31.b
+// CHECK-INST: msb	z0.b, p7/m, z1.b, z31.b
+// CHECK-ENCODING: [0xe0,0xff,0x01,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 ff 01 04 <unknown>
+
+msb z0.h, p7/m, z1.h, z31.h
+// CHECK-INST: msb	z0.h, p7/m, z1.h, z31.h
+// CHECK-ENCODING: [0xe0,0xff,0x41,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 ff 41 04 <unknown>
+
+msb z0.s, p7/m, z1.s, z31.s
+// CHECK-INST: msb	z0.s, p7/m, z1.s, z31.s
+// CHECK-ENCODING: [0xe0,0xff,0x81,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 ff 81 04 <unknown>
+
+msb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: msb	z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0xe0,0xff,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 ff c1 04 <unknown>