diff options
| author | Chris Lattner <sabre@nondot.org> | 2006-05-01 05:56:51 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-05-01 05:56:51 +0000 |
| commit | 78d9ae3f0cf9ccb0a01ca2db100aca27ab4dd5c4 (patch) | |
| tree | 37659b42354307efb24e95ed4a04f64bbca995d2 /llvm/test | |
| parent | 563f0417d272ff5505ec06d88876d22ee4c6a88f (diff) | |
| download | bcm5719-llvm-78d9ae3f0cf9ccb0a01ca2db100aca27ab4dd5c4.tar.gz bcm5719-llvm-78d9ae3f0cf9ccb0a01ca2db100aca27ab4dd5c4.zip | |
Intel mode no longer uses %'s on registers
llvm-svn: 28028
Diffstat (limited to 'llvm/test')
6 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll b/llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll index 509c07b74ae..8aa5f4da5de 100644 --- a/llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll +++ b/llvm/test/Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'test.*%AL' || \ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'cmove.*%EAX' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'test.*AL' || \ +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'cmove.*EAX' ; This testcase was compiling to: ; diff --git a/llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll b/llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll index e5a08e9a064..4efc4b7ce8a 100644 --- a/llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll +++ b/llvm/test/Regression/CodeGen/X86/2005-12-03-IndirectTailCall.ll @@ -1,5 +1,5 @@ ; XFAIL: * -; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*%ecx' +; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*ecx' declare int %putchar(int) int %main(){ diff --git a/llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll b/llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll index de8372cbc49..f31b180b271 100644 --- a/llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll +++ b/llvm/test/Regression/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'add %ESP, 8' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'add ESP, 8' target triple = "i686-pc-linux-gnu" diff --git a/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll b/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll index c9f9cee703a..6899683c4c4 100644 --- a/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll +++ b/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov %EDX, 1' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1' ; check that fastcc is passing stuff in regs. ; Argument reg passing is disabled due to regalloc issues. FIXME! diff --git a/llvm/test/Regression/CodeGen/X86/overlap-add.ll b/llvm/test/Regression/CodeGen/X86/overlap-add.ll index 70878a102f4..c5fc0bd89af 100644 --- a/llvm/test/Regression/CodeGen/X86/overlap-add.ll +++ b/llvm/test/Regression/CodeGen/X86/overlap-add.ll @@ -6,7 +6,7 @@ ; Check that the shift gets turned into an LEA. -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov E.X, E.X' ; FIXME: We need live variable information about flags to do this xform safely. :( ; XFAIL: * diff --git a/llvm/test/Regression/CodeGen/X86/overlap-shift.ll b/llvm/test/Regression/CodeGen/X86/overlap-shift.ll index 4d8c6881189..48f91e0cba9 100644 --- a/llvm/test/Regression/CodeGen/X86/overlap-shift.ll +++ b/llvm/test/Regression/CodeGen/X86/overlap-shift.ll @@ -6,7 +6,7 @@ ; Check that the shift gets turned into an LEA. -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov E.X, E.X' %G = external global int |
