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authorMarina Yatsina <marina.yatsina@intel.com>2016-09-28 15:52:56 +0000
committerMarina Yatsina <marina.yatsina@intel.com>2016-09-28 15:52:56 +0000
commit76bfc6670b08c1ae87136a2a1c9994386b0e630e (patch)
treecac221107fc84aa2b0442c13e7e54c1bd9a4fbf7 /llvm/test
parente17e055b75de5d084eee64ecba2111bde629a519 (diff)
downloadbcm5719-llvm-76bfc6670b08c1ae87136a2a1c9994386b0e630e.tar.gz
bcm5719-llvm-76bfc6670b08c1ae87136a2a1c9994386b0e630e.zip
[x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel)
Implement 'retn' simply by aliasing it to the relevant 'ret' instruction Commit on behalf of coby Differential Revision: https://reviews.llvm.org/D24346 llvm-svn: 282601
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/X86/ret.s16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/test/MC/X86/ret.s b/llvm/test/MC/X86/ret.s
index bac669b2561..142a4614ba4 100644
--- a/llvm/test/MC/X86/ret.s
+++ b/llvm/test/MC/X86/ret.s
@@ -57,6 +57,22 @@
// ERR32: error: instruction requires: 64-bit mode
// ERR16: error: instruction requires: 64-bit mode
+ retn
+// 64: retq
+// 64: encoding: [0xc3]
+// 32: retl
+// 32: encoding: [0xc3]
+// 16: retw
+// 16: encoding: [0xc3]
+
+ retn $0
+// 64: retq $0
+// 64: encoding: [0xc2,0x00,0x00]
+// 32: retl $0
+// 32: encoding: [0xc2,0x00,0x00]
+// 16: retw $0
+// 16: encoding: [0xc2,0x00,0x00]
+
lret
// 64: lretl
// 64: encoding: [0xcb]
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