[X86] Merge the different SETcc instructions for each condition code into single instructions that store the condition code as an operand.

Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between SETcc instructions and condition codes.

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.

Reviewers: andreadb, courbet, RKSimon, spatel, lebedev.ri

Reviewed By: andreadb

Subscribers: hiraditya, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60138

llvm-svn: 357801

6 files changed, 157 insertions, 157 deletions

diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir b/llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir
index e385c10b038..ad106b000e8 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir
@@ -99,8 +99,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr8 = COPY $dil
     ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY $sil
     ; CHECK: CMP8rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -130,8 +130,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr16 = COPY $di
     ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY $si
     ; CHECK: CMP16rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -161,8 +161,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
     ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
     ; CHECK: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -192,8 +192,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -223,8 +223,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETNEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -254,8 +254,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETAr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -285,8 +285,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETAEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -316,8 +316,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETBr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -347,8 +347,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETBEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -378,8 +378,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETGr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -409,8 +409,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETGEr:%[0-9]+]]:gr8 = SETGEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETGEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 13, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -440,8 +440,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETLr:%[0-9]+]]:gr8 = SETLr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETLr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 12, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
@@ -471,8 +471,8 @@ body:             |
     ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
     ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETLEr:%[0-9]+]]:gr8 = SETLEr implicit $eflags
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETLEr]], %subreg.sub_8bit
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 14, implicit $eflags
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[SETCCr]], %subreg.sub_8bit
     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags
     ; CHECK: $eax = COPY [[AND32ri8_]]
     ; CHECK: RET 0, implicit $eax
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir b/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
index 497c92838ae..1c0f4bc251d 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
@@ -127,8 +127,8 @@ body:             |
   ; ALL:   [[COPY4:%[0-9]+]]:gr8 = COPY [[COPY3]].sub_8bit
   ; ALL:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
-  ; ALL:   [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-  ; ALL:   TEST8ri [[SETGr]], 1, implicit-def $eflags
+  ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+  ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
   ; ALL:   JNE_1 %bb.2, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
@@ -186,8 +186,8 @@ body:             |
   ; ALL:   [[COPY4:%[0-9]+]]:gr16 = COPY [[COPY3]].sub_16bit
   ; ALL:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
-  ; ALL:   [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-  ; ALL:   TEST8ri [[SETGr]], 1, implicit-def $eflags
+  ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+  ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
   ; ALL:   JNE_1 %bb.2, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
@@ -241,8 +241,8 @@ body:             |
   ; ALL:   [[COPY2:%[0-9]+]]:gr32 = COPY $edx
   ; ALL:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
-  ; ALL:   [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-  ; ALL:   TEST8ri [[SETGr]], 1, implicit-def $eflags
+  ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+  ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
   ; ALL:   JNE_1 %bb.1, implicit $eflags
   ; ALL:   JMP_1 %bb.2
   ; ALL: bb.1.cond.true:
@@ -304,8 +304,8 @@ body:             |
   ; ALL:   [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
   ; ALL:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
-  ; ALL:   [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-  ; ALL:   TEST8ri [[SETGr]], 1, implicit-def $eflags
+  ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+  ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
   ; ALL:   JNE_1 %bb.1, implicit $eflags
   ; ALL:   JMP_1 %bb.2
   ; ALL: bb.1.cond.true:
@@ -376,8 +376,8 @@ body:             |
   ; ALL:   [[COPY4:%[0-9]+]]:fr32 = COPY [[COPY3]]
   ; ALL:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
-  ; ALL:   [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-  ; ALL:   TEST8ri [[SETGr]], 1, implicit-def $eflags
+  ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+  ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
   ; ALL:   JNE_1 %bb.2, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
@@ -437,8 +437,8 @@ body:             |
   ; ALL:   [[COPY4:%[0-9]+]]:fr64 = COPY [[COPY3]]
   ; ALL:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
-  ; ALL:   [[SETGr:%[0-9]+]]:gr8 = SETGr implicit $eflags
-  ; ALL:   TEST8ri [[SETGr]], 1, implicit-def $eflags
+  ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
+  ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
   ; ALL:   JNE_1 %bb.2, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
index d3cff9cfd35..9c0396db899 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
@@ -169,9 +169,9 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
-    ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETEr]], [[SETNPr]], implicit-def $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags
+    ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags
     ; CHECK: $al = COPY [[AND8rr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
@@ -209,8 +209,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
-    ; CHECK: $al = COPY [[SETAr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -247,8 +247,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
-    ; CHECK: $al = COPY [[SETAEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -285,8 +285,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
-    ; CHECK: $al = COPY [[SETAr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -323,8 +323,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
-    ; CHECK: $al = COPY [[SETAEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -361,8 +361,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
-    ; CHECK: $al = COPY [[SETNEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -399,8 +399,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
-    ; CHECK: $al = COPY [[SETNPr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -437,8 +437,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
-    ; CHECK: $al = COPY [[SETPr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -475,8 +475,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: $al = COPY [[SETEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -513,8 +513,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
-    ; CHECK: $al = COPY [[SETBr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -551,8 +551,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
-    ; CHECK: $al = COPY [[SETBEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -589,8 +589,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
-    ; CHECK: $al = COPY [[SETBr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -627,8 +627,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
-    ; CHECK: $al = COPY [[SETBEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s32) = G_TRUNC %2(s128)
@@ -665,9 +665,9 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]]
     ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
-    ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
-    ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETNEr]], [[SETPr]], implicit-def $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
+    ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags
+    ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags
     ; CHECK: $al = COPY [[OR8rr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
@@ -705,9 +705,9 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
-    ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETEr]], [[SETNPr]], implicit-def $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags
+    ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags
     ; CHECK: $al = COPY [[AND8rr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
@@ -745,8 +745,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
-    ; CHECK: $al = COPY [[SETAr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -783,8 +783,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
-    ; CHECK: $al = COPY [[SETAEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -821,8 +821,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETAr:%[0-9]+]]:gr8 = SETAr implicit $eflags
-    ; CHECK: $al = COPY [[SETAr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -859,8 +859,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETAEr:%[0-9]+]]:gr8 = SETAEr implicit $eflags
-    ; CHECK: $al = COPY [[SETAEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -897,8 +897,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
-    ; CHECK: $al = COPY [[SETNEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -935,8 +935,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETNPr:%[0-9]+]]:gr8 = SETNPr implicit $eflags
-    ; CHECK: $al = COPY [[SETNPr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -973,8 +973,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
-    ; CHECK: $al = COPY [[SETPr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -1011,8 +1011,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETEr:%[0-9]+]]:gr8 = SETEr implicit $eflags
-    ; CHECK: $al = COPY [[SETEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -1049,8 +1049,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
-    ; CHECK: $al = COPY [[SETBr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -1087,8 +1087,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags
-    ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
-    ; CHECK: $al = COPY [[SETBEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -1125,8 +1125,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit $eflags
-    ; CHECK: $al = COPY [[SETBr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -1163,8 +1163,8 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETBEr:%[0-9]+]]:gr8 = SETBEr implicit $eflags
-    ; CHECK: $al = COPY [[SETBEr]]
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
     %0:vecr(s64) = G_TRUNC %2(s128)
@@ -1201,9 +1201,9 @@ body:             |
     ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1
     ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]]
     ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags
-    ; CHECK: [[SETNEr:%[0-9]+]]:gr8 = SETNEr implicit $eflags
-    ; CHECK: [[SETPr:%[0-9]+]]:gr8 = SETPr implicit $eflags
-    ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETNEr]], [[SETPr]], implicit-def $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
+    ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags
+    ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags
     ; CHECK: $al = COPY [[OR8rr]]
     ; CHECK: RET 0, implicit $al
     %2:vecr(s128) = COPY $xmm0
diff --git a/llvm/test/CodeGen/X86/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
index 3f009429bd5..01b902bddae 100644
--- a/llvm/test/CodeGen/X86/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
@@ -119,8 +119,8 @@ body:             |
     CMP64rr %0, %1, implicit-def $eflags
     %2:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -175,8 +175,8 @@ body:             |
     CMP64rr %0, %1, implicit-def $eflags
     %2:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -230,10 +230,10 @@ body:             |
     CMP64rr %0, %1, implicit-def $eflags
     %2:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
-  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
-  ; CHECK-NEXT: %[[NE_REG:[^:]*]]:gr8 = SETNEr implicit $eflags
+  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
+  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
+  ; CHECK-NEXT: %[[NE_REG:[^:]*]]:gr8 = SETCCr 5, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -241,10 +241,10 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
-    %3:gr8 = SETAr implicit $eflags
-    %4:gr8 = SETBr implicit $eflags
-    %5:gr8 = SETEr implicit $eflags
-    SETNEm $rsp, 1, $noreg, -16, $noreg, implicit killed $eflags
+    %3:gr8 = SETCCr 7, implicit $eflags
+    %4:gr8 = SETCCr 2, implicit $eflags
+    %5:gr8 = SETCCr 4, implicit $eflags
+    SETCCm $rsp, 1, $noreg, -16, $noreg, 5, implicit killed $eflags
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %3
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %4
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %5
@@ -273,9 +273,9 @@ body:             |
     CMP64rr %0, %1, implicit-def $eflags
     %2:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
-  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
+  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
+  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -319,7 +319,7 @@ body:             |
     %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -353,7 +353,7 @@ body:             |
     %2:gr64 = SUB64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY killed $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -387,8 +387,8 @@ body:             |
     %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
-  ; CHECK:        %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
-  ; CHECK-NEXT:   %[[CF_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:        %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
+  ; CHECK-NEXT:   %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -426,8 +426,8 @@ body:             |
     %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
-  ; CHECK:        %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
-  ; CHECK-NEXT:   %[[OF_REG:[^:]*]]:gr8 = SETOr implicit $eflags
+  ; CHECK:        %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
+  ; CHECK-NEXT:   %[[OF_REG:[^:]*]]:gr8 = SETCCr 0, implicit $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -465,7 +465,7 @@ body:             |
     %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -499,7 +499,7 @@ body:             |
     %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -533,7 +533,7 @@ body:             |
     %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
     %3:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -599,10 +599,10 @@ body:             |
     CMP64rr %0, %1, implicit-def $eflags
     %2:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[S_REG:[^:]*]]:gr8 = SETSr implicit $eflags
-  ; CHECK-NEXT: %[[NE_REG:[^:]*]]:gr8 = SETNEr implicit $eflags
-  ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:      %[[S_REG:[^:]*]]:gr8 = SETCCr 8, implicit $eflags
+  ; CHECK-NEXT: %[[NE_REG:[^:]*]]:gr8 = SETCCr 5, implicit $eflags
+  ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -672,12 +672,12 @@ body:             |
     CMP64rr %0, %1, implicit-def $eflags
     %2:gr64 = COPY $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
-  ; CHECK:      %[[S_REG:[^:]*]]:gr8 = SETSr implicit $eflags
-  ; CHECK-NEXT: %[[P_REG:[^:]*]]:gr8 = SETPr implicit $eflags
-  ; CHECK-NEXT: %[[NE_REG:[^:]*]]:gr8 = SETNEr implicit $eflags
-  ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
-  ; CHECK-NEXT: %[[O_REG:[^:]*]]:gr8 = SETOr implicit $eflags
+  ; CHECK:      %[[S_REG:[^:]*]]:gr8 = SETCCr 8, implicit $eflags
+  ; CHECK-NEXT: %[[P_REG:[^:]*]]:gr8 = SETCCr 10, implicit $eflags
+  ; CHECK-NEXT: %[[NE_REG:[^:]*]]:gr8 = SETCCr 5, implicit $eflags
+  ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
+  ; CHECK-NEXT: %[[O_REG:[^:]*]]:gr8 = SETCCr 0, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -824,9 +824,9 @@ body:             |
     JMP_1 %bb.4
   ; CHECK:      bb.1:
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
-  ; CHECK:        %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT:   %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
-  ; CHECK-NEXT:   %[[B_REG:[^:]*]]:gr8 = SETBr implicit $eflags
+  ; CHECK:        %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT:   %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
+  ; CHECK-NEXT:   %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
   bb.2:
@@ -962,12 +962,12 @@ body:             |
     %0:gr64 = COPY $rdi
     %1:gr64 = COPY $rsi
     CMP64rr %0, %1, implicit-def $eflags
-    %2:gr8 = SETAr implicit $eflags
-    %3:gr8 = SETAEr implicit $eflags
+    %2:gr8 = SETCCr 7, implicit $eflags
+    %3:gr8 = SETCCr 3, implicit $eflags
     %4:gr64 = COPY $eflags
   ; CHECK:      CMP64rr %0, %1, implicit-def $eflags
-  ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
-  ; CHECK-NEXT: %[[AE_REG:[^:]*]]:gr8 = SETAEr implicit $eflags
+  ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[AE_REG:[^:]*]]:gr8 = SETCCr 3, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
@@ -1020,15 +1020,15 @@ body:             |
     %0:gr64 = COPY $rdi
     %1:gr64 = COPY $rsi
     CMP64rr %0, %1, implicit-def $eflags
-    SETEm %0, 1, $noreg, -16, $noreg, implicit $eflags
+    SETCCm %0, 1, $noreg, -16, $noreg, 4, implicit $eflags
     %2:gr64 = COPY $eflags
   ; CHECK:      CMP64rr %0, %1, implicit-def $eflags
   ; We cannot reuse this SETE because it stores the flag directly to memory,
   ; so we have two SETEs here. FIXME: It'd be great if something could fold
   ; these automatically. If not, maybe we want to unfold SETcc instructions
   ; writing to memory so we can reuse them.
-  ; CHECK-NEXT: SETEm {{.*}} implicit $eflags
-  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
+  ; CHECK-NEXT: SETCCm {{.*}} 4, implicit $eflags
+  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
   ; CHECK-NOT:  COPY{{( killed)?}} $eflags
 
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
diff --git a/llvm/test/CodeGen/X86/pr27681.mir b/llvm/test/CodeGen/X86/pr27681.mir
index ecc5abf1aee..2a6febd70e4 100644
--- a/llvm/test/CodeGen/X86/pr27681.mir
+++ b/llvm/test/CodeGen/X86/pr27681.mir
@@ -45,7 +45,7 @@ body:             |
     $ebp = SHR32rCL killed $ebp, implicit-def dead $eflags, implicit $cl
     $ebp = XOR32rr killed $ebp, killed $ebx, implicit-def dead $eflags
     TEST32rr $edx, $edx, implicit-def $eflags
-    $cl = SETNEr implicit $eflags
+    $cl = SETCCr 5, implicit $eflags
     ; This %bl def is antidependent on the above use of $ebx
     $bl = MOV8rm $esp, 1, $noreg, 3, _ ; :: (load 1 from %stack.0)
     $cl = OR8rr killed $cl, $bl, implicit-def dead $eflags
@@ -54,7 +54,7 @@ body:             |
     $ecx = MOV32rm $esp, 1, $noreg, 24, _ ; :: (load 4 from %stack.2)
     $edx = SAR32rCL killed $edx, implicit-def dead $eflags, implicit $cl
     TEST32rr killed $edx, $edx, implicit-def $eflags
-    $cl = SETNEr implicit $eflags
+    $cl = SETCCr 5, implicit $eflags
     ; Verify that removal of the $bl antidependence does not use $ch
     ; as a replacement register.
     ; CHECK: $cl = AND8rr killed $cl, killed $b
@@ -67,7 +67,7 @@ body:             |
     liveins: $cl, $eax, $ebp, $esi
 
     OR32mr $esp, 1, $noreg, 8, $noreg, killed $eax, implicit-def $eflags ; :: (store 4 into %stack.1)
-    $dl = SETNEr implicit $eflags, implicit-def $edx
+    $dl = SETCCr 5, implicit $eflags, implicit-def $edx
 
   bb.3:
     liveins: $cl, $ebp, $edx, $esi
diff --git a/llvm/test/CodeGen/X86/stack-folding-adx.mir b/llvm/test/CodeGen/X86/stack-folding-adx.mir
index 6e977821853..ec74eeb3a34 100644
--- a/llvm/test/CodeGen/X86/stack-folding-adx.mir
+++ b/llvm/test/CodeGen/X86/stack-folding-adx.mir
@@ -93,10 +93,10 @@ body:             |
     ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, -1, implicit-def $eflags
     ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.2, 1, $noreg, 0, $noreg :: (load 4 from %stack.2)
     ; CHECK: [[ADCX32rm:%[0-9]+]]:gr32 = ADCX32rm [[ADCX32rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load 4 from %stack.1)
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit killed $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit killed $eflags
     ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)
     ; CHECK: MOV32mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADCX32rm]] :: (store 4 into %ir.4, align 1)
-    ; CHECK: $al = COPY [[SETBr]]
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, $al
     %3:gr64 = COPY $rcx
     %2:gr32 = COPY $edx
@@ -105,7 +105,7 @@ body:             |
     INLINEASM &nop, 1, 3145738, def dead %4, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
     dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, -1, implicit-def $eflags
     %7:gr32 = ADCX32rr %7, %2, implicit-def $eflags, implicit killed $eflags
-    %8:gr8 = SETBr implicit killed $eflags
+    %8:gr8 = SETCCr 2, implicit killed $eflags
     MOV32mr %3, 1, $noreg, 0, $noreg, %7 :: (store 4 into %ir.4, align 1)
     $al = COPY %8
     RET 0, killed $al
@@ -145,10 +145,10 @@ body:             |
     ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, -1, implicit-def $eflags
     ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.2, 1, $noreg, 0, $noreg :: (load 8 from %stack.2)
     ; CHECK: [[ADCX64rm:%[0-9]+]]:gr64 = ADCX64rm [[ADCX64rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load 8 from %stack.1)
-    ; CHECK: [[SETBr:%[0-9]+]]:gr8 = SETBr implicit killed $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit killed $eflags
     ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)
     ; CHECK: MOV64mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADCX64rm]] :: (store 8 into %ir.4, align 1)
-    ; CHECK: $al = COPY [[SETBr]]
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, $al
     %3:gr64 = COPY $rcx
     %2:gr64 = COPY $rdx
@@ -157,7 +157,7 @@ body:             |
     INLINEASM &nop, 1, 3145738, def dead %4, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
     dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, -1, implicit-def $eflags
     %7:gr64 = ADCX64rr %7, %2, implicit-def $eflags, implicit killed $eflags
-    %8:gr8 = SETBr implicit killed $eflags
+    %8:gr8 = SETCCr 2, implicit killed $eflags
     MOV64mr %3, 1, $noreg, 0, $noreg, %7 :: (store 8 into %ir.4, align 1)
     $al = COPY %8
     RET 0, killed $al
@@ -197,10 +197,10 @@ body:             |
     ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, 127, implicit-def $eflags
     ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.2, 1, $noreg, 0, $noreg :: (load 4 from %stack.2)
     ; CHECK: [[ADOX32rm:%[0-9]+]]:gr32 = ADOX32rm [[ADOX32rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load 4 from %stack.1)
-    ; CHECK: [[SETOr:%[0-9]+]]:gr8 = SETOr implicit killed $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 0, implicit killed $eflags
     ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)
     ; CHECK: MOV32mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADOX32rm]] :: (store 4 into %ir.4, align 1)
-    ; CHECK: $al = COPY [[SETOr]]
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, $al
     %3:gr64 = COPY $rcx
     %2:gr32 = COPY $edx
@@ -209,7 +209,7 @@ body:             |
     INLINEASM &nop, 1, 3145738, def dead %4, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
     dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, 127, implicit-def $eflags
     %7:gr32 = ADOX32rr %7, %2, implicit-def $eflags, implicit killed $eflags
-    %8:gr8 = SETOr implicit killed $eflags
+    %8:gr8 = SETCCr 0, implicit killed $eflags
     MOV32mr %3, 1, $noreg, 0, $noreg, %7 :: (store 4 into %ir.4, align 1)
     $al = COPY %8
     RET 0, killed $al
@@ -249,10 +249,10 @@ body:             |
     ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, 127, implicit-def $eflags
     ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.2, 1, $noreg, 0, $noreg :: (load 8 from %stack.2)
     ; CHECK: [[ADOX64rm:%[0-9]+]]:gr64 = ADOX64rm [[ADOX64rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load 8 from %stack.1)
-    ; CHECK: [[SETOr:%[0-9]+]]:gr8 = SETOr implicit killed $eflags
+    ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 0, implicit killed $eflags
     ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)
     ; CHECK: MOV64mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADOX64rm]] :: (store 8 into %ir.4, align 1)
-    ; CHECK: $al = COPY [[SETOr]]
+    ; CHECK: $al = COPY [[SETCCr]]
     ; CHECK: RET 0, $al
     %3:gr64 = COPY $rcx
     %2:gr64 = COPY $rdx
@@ -261,7 +261,7 @@ body:             |
     INLINEASM &nop, 1, 3145738, def dead %4, 12, implicit-def dead early-clobber $rax, 12, implicit-def dead early-clobber $rbx, 12, implicit-def dead early-clobber $rcx, 12, implicit-def dead early-clobber $rdx, 12, implicit-def dead early-clobber $rsi, 12, implicit-def dead early-clobber $rdi, 12, implicit-def dead early-clobber $rbp, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15
     dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, 127, implicit-def $eflags
     %7:gr64 = ADOX64rr %7, %2, implicit-def $eflags, implicit killed $eflags
-    %8:gr8 = SETOr implicit killed $eflags
+    %8:gr8 = SETCCr 0, implicit killed $eflags
     MOV64mr %3, 1, $noreg, 0, $noreg, %7 :: (store 8 into %ir.4, align 1)
     $al = COPY %8
     RET 0, killed $al