Revert "ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2"

This reverts commit r241926. This caused http://llvm.org/PR24190

llvm-svn: 242735

6 files changed, 16 insertions, 36 deletions

diff --git a/llvm/test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll b/llvm/test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
index ac5b6f9c970..c93d2a2d34f 100644
--- a/llvm/test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
+++ b/llvm/test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
@@ -25,7 +25,8 @@ entry:
   ;CHECK: push {r7, lr}
   ;CHECK: sub sp, #4
   ;CHECK: add r0, sp, #12
-  ;CHECK: strd r1, r2, [sp, #12]
+  ;CHECK: str r2, [sp, #16]
+  ;CHECK: str r1, [sp, #12]
   ;CHECK: bl  fooUseStruct
   call void @fooUseStruct(%st_t* %p1)
   ret void
diff --git a/llvm/test/CodeGen/ARM/byval-align.ll b/llvm/test/CodeGen/ARM/byval-align.ll
index 8a506280dd5..a26b5a79575 100644
--- a/llvm/test/CodeGen/ARM/byval-align.ll
+++ b/llvm/test/CodeGen/ARM/byval-align.ll
@@ -28,7 +28,8 @@ define i32 @test_align8(i8*, [4 x i32]* byval align 8 %b) {
 ; CHECK: push {r4, r7, lr}
 ; CHECK: add r7, sp, #4
 
-; CHECK: strd r2, r3, [r7, #8]
+; CHECK-DAG: str r2, [r7, #8]
+; CHECK-DAG: str r3, [r7, #12]
 
 ; CHECK: ldr r0, [r7, #8]
 
diff --git a/llvm/test/CodeGen/ARM/ldrd.ll b/llvm/test/CodeGen/ARM/ldrd.ll
index 5411618ed86..f3e13671ac3 100644
--- a/llvm/test/CodeGen/ARM/ldrd.ll
+++ b/llvm/test/CodeGen/ARM/ldrd.ll
@@ -3,7 +3,6 @@
 ; rdar://6949835
 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=BASIC -check-prefix=CHECK
 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=greedy | FileCheck %s -check-prefix=GREEDY -check-prefix=CHECK
-; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=swift | FileCheck %s -check-prefix=SWIFT -check-prefix=CHECK
 
 ; Magic ARM pair hints works best with linearscan / fast.
 
@@ -111,25 +110,5 @@ entry:
   ret void
 }
 
-; CHECK-LABEL: strd_spill_ldrd_reload:
-; A8: strd r1, r0, [sp]
-; M3: strd r1, r0, [sp]
-; BASIC: strd r1, r0, [sp]
-; GREEDY: strd r0, r1, [sp]
-; CHECK: @ InlineAsm Start
-; CHECK: @ InlineAsm End
-; A8: ldrd r2, r1, [sp]
-; M3: ldrd r2, r1, [sp]
-; BASIC: ldrd r2, r1, [sp]
-; GREEDY: ldrd r1, r2, [sp]
-; CHECK: bl{{x?}} _extfunc
-define void @strd_spill_ldrd_reload(i32 %v0, i32 %v1) {
-  ; force %v0 and %v1 to be spilled
-  call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{lr}"()
-  ; force the reloaded %v0, %v1 into different registers
-  call void @extfunc(i32 0, i32 %v0, i32 %v1, i32 7)
-  ret void
-}
-
 declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
 declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
diff --git a/llvm/test/CodeGen/ARM/memset-inline.ll b/llvm/test/CodeGen/ARM/memset-inline.ll
index f6f8d562350..191db1e20a2 100644
--- a/llvm/test/CodeGen/ARM/memset-inline.ll
+++ b/llvm/test/CodeGen/ARM/memset-inline.ll
@@ -4,7 +4,8 @@ define void @t1(i8* nocapture %c) nounwind optsize {
 entry:
 ; CHECK-LABEL: t1:
 ; CHECK: movs r1, #0
-; CHECK: strd r1, r1, [r0]
+; CHECK: str r1, [r0]
+; CHECK: str r1, [r0, #4]
 ; CHECK: str r1, [r0, #8]
   call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false)
   ret void
diff --git a/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll b/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
index fe335df7a1a..96c5fb8961e 100644
--- a/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
+++ b/llvm/test/CodeGen/ARM/wrong-t2stmia-size-opt.ll
@@ -5,20 +5,16 @@ target triple = "thumbv7--linux-gnueabi"
 
 declare i8* @llvm.returnaddress(i32)
 
-define i32* @wrong-t2stmia-size-reduction(i32* %addr, i32 %val0, i32 %val1) minsize {
+define i32* @wrong-t2stmia-size-reduction(i32* %addr, i32 %val0) minsize {
   store i32 %val0, i32* %addr
   %addr1 = getelementptr i32, i32* %addr, i32 1
-  %addr2 = getelementptr i32, i32* %addr, i32 2
   %lr = call i8* @llvm.returnaddress(i32 0)
   %lr32 = ptrtoint i8* %lr to i32
-  store i32 %val1, i32* %addr1
-  store i32 %lr32, i32* %addr2
-
-  %addr3 = getelementptr i32, i32* %addr, i32 3
-  ret i32* %addr3
+  store i32 %lr32, i32* %addr1
+  %addr2 = getelementptr i32, i32* %addr1, i32 1
+  ret i32* %addr2
 }
 
-; Check that stm writes three registers.  The bug caused one of registers (LR,
+; Check that stm writes two registers.  The bug caused one of registers (LR,
 ; which invalid for Thumb1 form of STMIA instruction) to be dropped.
-; CHECK-LABEL: wrong-t2stmia-size-reduction:
-; CHECK: stm{{[^,]*}}, {{{.*,.*,.*}}}
+; CHECK: stm{{[^,]*}}, {{{.*,.*}}}
diff --git a/llvm/test/CodeGen/Thumb2/aapcs.ll b/llvm/test/CodeGen/Thumb2/aapcs.ll
index 299562fe4c5..21af8c119b0 100644
--- a/llvm/test/CodeGen/Thumb2/aapcs.ll
+++ b/llvm/test/CodeGen/Thumb2/aapcs.ll
@@ -33,7 +33,8 @@ define float @float_on_stack(double %a, double %b, double %c, double %d, double
 
 define double @double_on_stack(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i) {
 ; CHECK-LABEL: double_on_stack:
-; SOFT: ldrd r0, r1, [sp, #48]
+; SOFT: ldr r0, [sp, #48]
+; SOFT: ldr r1, [sp, #52]
 ; HARD: vldr d0, [sp]
 ; CHECK-NEXT: bx lr
   ret double %i
@@ -41,7 +42,8 @@ define double @double_on_stack(double %a, double %b, double %c, double %d, doubl
 
 define double @double_not_split(double %a, double %b, double %c, double %d, double %e, double %f, double %g, float %h, double %i) {
 ; CHECK-LABEL: double_not_split:
-; SOFT: ldrd r0, r1, [sp, #48]
+; SOFT: ldr r0, [sp, #48]
+; SOFT: ldr r1, [sp, #52]
 ; HARD: vldr d0, [sp]
 ; CHECK-NEXT: bx lr
   ret double %i