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| author | Tim Northover <tnorthover@apple.com> | 2013-08-12 09:45:46 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-08-12 09:45:46 +0000 |
| commit | 707d68f082c6c084a137fd74876b3d8b0a26fba0 (patch) | |
| tree | 49bc315f6a288dade0a6e2ba142c8a7e1af2a3eb /llvm/test | |
| parent | c9b7d47b21734daafa80ade664f06fee584fd000 (diff) | |
| download | bcm5719-llvm-707d68f082c6c084a137fd74876b3d8b0a26fba0.tar.gz bcm5719-llvm-707d68f082c6c084a137fd74876b3d8b0a26fba0.zip | |
Allow compatible extension attributes for tail calls
If the tail-callee and caller give the same bits via the same signext/zeroext
attribute then a tail-call should be allowed, since the extension has already
been done by the callee.
llvm-svn: 188159
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/sibcall.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/tail-call-attrs.ll | 56 |
2 files changed, 59 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/sibcall.ll b/llvm/test/CodeGen/X86/sibcall.ll index 7b774f6b692..589e9ec1052 100644 --- a/llvm/test/CodeGen/X86/sibcall.ll +++ b/llvm/test/CodeGen/X86/sibcall.ll @@ -106,10 +106,10 @@ declare i32 @bar2(i32, i32, i32) define signext i16 @t8() nounwind ssp { entry: ; 32-LABEL: t8: -; 32: calll {{_?}}bar3 +; 32: jmp {{_?}}bar3 ; 64-LABEL: t8: -; 64: callq {{_?}}bar3 +; 64: jmp {{_?}}bar3 %0 = tail call signext i16 @bar3() nounwind ; <i16> [#uses=1] ret i16 %0 } @@ -122,7 +122,7 @@ entry: ; 32: calll * ; 64-LABEL: t9: -; 64: callq * +; 64: jmpq * %0 = bitcast i32 (i32)* %x to i16 (i32)* %1 = tail call signext i16 %0(i32 0) nounwind ret i16 %1 diff --git a/llvm/test/CodeGen/X86/tail-call-attrs.ll b/llvm/test/CodeGen/X86/tail-call-attrs.ll new file mode 100644 index 00000000000..17ebe997c8c --- /dev/null +++ b/llvm/test/CodeGen/X86/tail-call-attrs.ll @@ -0,0 +1,56 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -o - %s | FileCheck %s + +; Simple case: completely identical returns, even with extensions, shouldn't be +; a barrier to tail calls. +declare zeroext i1 @give_bool() +define zeroext i1 @test_bool() { +; CHECK-LABEL: test_bool: +; CHECK: jmp + %call = tail call zeroext i1 @give_bool() + ret i1 %call +} + +; Here, there's more zero extension to be done between the call and the return, +; so a tail call is impossible (well, according to current Clang practice +; anyway. The AMD64 ABI isn't crystal clear on the matter). +declare zeroext i32 @give_i32() +define zeroext i8 @test_i32() { +; CHECK-LABEL: test_i32: +; CHECK: callq _give_i32 +; CHECK: movzbl %al, %eax +; CHECK: ret + + %call = tail call zeroext i32 @give_i32() + %val = trunc i32 %call to i8 + ret i8 %val +} + +; Here, one function is zeroext and the other is signext. To the extent that +; these both mean something they are incompatible so no tail call is possible. +declare zeroext i16 @give_unsigned_i16() +define signext i16 @test_incompatible_i16() { +; CHECK-LABEL: test_incompatible_i16: +; CHECK: callq _give_unsigned_i16 +; CHECK: cwtl +; CHECK: ret + + %call = tail call zeroext i16 @give_unsigned_i16() + ret i16 %call +} + +declare inreg i32 @give_i32_inreg() +define i32 @test_inreg_to_normal() { +; CHECK-LABEL: test_inreg_to_normal: +; CHECK: callq _give_i32_inreg +; CHECK: ret + %val = tail call inreg i32 @give_i32_inreg() + ret i32 %val +} + +define inreg i32 @test_normal_to_inreg() { +; CHECK-LABEL: test_normal_to_inreg: +; CHECK: callq _give_i32 +; CHECK: ret + %val = tail call i32 @give_i32() + ret i32 %val +} |

