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author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2015-02-20 19:37:14 +0000 |
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committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2015-02-20 19:37:14 +0000 |
commit | 7035178aebc91d0ed99759919865d6745ac052e2 (patch) | |
tree | 3e7e58561c265dc9c71c06d621b8ae9f48462d9d /llvm/test | |
parent | f20413245a8667e105a8850ed68165d8ed13bde3 (diff) | |
download | bcm5719-llvm-7035178aebc91d0ed99759919865d6745ac052e2.tar.gz bcm5719-llvm-7035178aebc91d0ed99759919865d6745ac052e2.zip |
[X86][FastIsel] Teach how to select float-half conversion intrinsics.
This patch teaches X86FastISel how to select intrinsic 'convert_from_fp16' and
intrinsic 'convert_to_fp16'.
If the target has F16C, we can select VCVTPS2PHrr for a float-half conversion,
and VCVTPH2PSrr for a half-float conversion.
Differential Revision: http://reviews.llvm.org/D7673
llvm-svn: 230043
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-double-half-convertion.ll | 23 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll | 28 |
2 files changed, 51 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/fast-isel-double-half-convertion.ll b/llvm/test/CodeGen/X86/fast-isel-double-half-convertion.ll new file mode 100644 index 00000000000..ade867b7d70 --- /dev/null +++ b/llvm/test/CodeGen/X86/fast-isel-double-half-convertion.ll @@ -0,0 +1,23 @@ +; RUN: llc -fast-isel -fast-isel-abort -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s + +; XFAIL: * + +; In the future, we might want to teach fast-isel how to expand a double-to-half +; conversion into a double-to-float conversion immediately followed by a +; float-to-half conversion. For now, fast-isel is expected to fail. + +define double @test_fp16_to_fp64(i32 %a) { +entry: + %0 = trunc i32 %a to i16 + %1 = call double @llvm.convert.from.fp16.f64(i16 %0) + ret float %0 +} + +define i16 @test_fp64_to_fp16(double %a) { +entry: + %0 = call i16 @llvm.convert.to.fp16.f64(double %a) + ret i16 %0 +} + +declare i16 @llvm.convert.to.fp16.f64(double) +declare double @llvm.convert.from.fp16.f64(i16) diff --git a/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll b/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll new file mode 100644 index 00000000000..ee89bcd2a8b --- /dev/null +++ b/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll @@ -0,0 +1,28 @@ +; RUN: llc -fast-isel -fast-isel-abort -asm-verbose=false -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s + +; Verify that fast-isel correctly expands float-half conversions. + +define i16 @test_fp32_to_fp16(float %a) { +; CHECK-LABEL: test_fp32_to_fp16: +; CHECK: vcvtps2ph $0, %xmm0, %xmm0 +; CHECK-NEXT: vmovd %xmm0, %eax +; CHECK-NEXT: retq +entry: + %0 = call i16 @llvm.convert.to.fp16.f32(float %a) + ret i16 %0 +} + +define float @test_fp16_to_fp32(i32 %a) { +; CHECK-LABEL: test_fp16_to_fp32: +; CHECK: movswl %di, %eax +; CHECK-NEXT: vmovd %eax, %xmm0 +; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0 +; CHECK-NEXT: retq +entry: + %0 = trunc i32 %a to i16 + %1 = call float @llvm.convert.from.fp16.f32(i16 %0) + ret float %1 +} + +declare i16 @llvm.convert.to.fp16.f32(float) +declare float @llvm.convert.from.fp16.f32(i16) |