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authorJim Grosbach <grosbach@apple.com>2012-04-11 17:40:18 +0000
committerJim Grosbach <grosbach@apple.com>2012-04-11 17:40:18 +0000
commit6e536de1a184fcdf517aa46d39f5b50d3af0ada4 (patch)
tree478f3611f1ccc4d6140e0e4fef03ae73fc66134f /llvm/test
parenta5eee987e02c9ab1755c64287646d9f4f8f42273 (diff)
downloadbcm5719-llvm-6e536de1a184fcdf517aa46d39f5b50d3af0ada4.tar.gz
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ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
While there is an encoding for it in VUZP, the result of that is undefined, so we should avoid it. Define the instruction as a pseudo for VTRN.32 instead, as the ARM ARM indicates. rdar://11222366 llvm-svn: 154511
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/ARM/neon-shuffle-encoding.s2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/neon-shuffle-encoding.s b/llvm/test/MC/ARM/neon-shuffle-encoding.s
index e4d60776a97..0f07d9f9968 100644
--- a/llvm/test/MC/ARM/neon-shuffle-encoding.s
+++ b/llvm/test/MC/ARM/neon-shuffle-encoding.s
@@ -60,6 +60,7 @@
vzip.16 q9, q8
vzip.32 q9, q8
vzip.32 d2, d3
+ vuzp.32 d2, d3
@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3]
@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3]
@@ -72,6 +73,7 @@
@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xf3]
@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xf3]
@ CHECK: vtrn.32 d2, d3 @ encoding: [0x83,0x20,0xba,0xf3]
+@ CHECK: vtrn.32 d2, d3 @ encoding: [0x83,0x20,0xba,0xf3]
@ VTRN alternate size suffices
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