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authorVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2014-10-17 12:38:35 +0000
committerVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2014-10-17 12:38:35 +0000
commit6d1e64896d521abf7ba6537ba5f25ae57e6b5492 (patch)
tree062c92a4f167452ae052b38a2f01645bf02c772e /llvm/test
parentdd38c0b876dc5f1525b1e2e43e46e0e43d229c5b (diff)
downloadbcm5719-llvm-6d1e64896d521abf7ba6537ba5f25ae57e6b5492.tar.gz
bcm5719-llvm-6d1e64896d521abf7ba6537ba5f25ae57e6b5492.zip
[mips] Add support for COP0's Branch-On-Cond-Likely instructions
Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5782 llvm-svn: 220036
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Mips/mips-jump-delay-slots.s104
-rw-r--r--llvm/test/MC/Mips/mips1/invalid-mips2.s8
-rw-r--r--llvm/test/MC/Mips/mips2/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips3/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips32/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips32r2/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s8
-rw-r--r--llvm/test/MC/Mips/mips32r6/invalid-mips2.s8
-rw-r--r--llvm/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s8
-rw-r--r--llvm/test/MC/Mips/mips4/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips5/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64r2/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64r6/invalid-mips2.s8
-rw-r--r--llvm/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s8
15 files changed, 192 insertions, 24 deletions
diff --git a/llvm/test/MC/Mips/mips-jump-delay-slots.s b/llvm/test/MC/Mips/mips-jump-delay-slots.s
new file mode 100644
index 00000000000..2c0146b98b0
--- /dev/null
+++ b/llvm/test/MC/Mips/mips-jump-delay-slots.s
@@ -0,0 +1,104 @@
+# Verify that every branch and jump instruction is followed by a delay slot
+# except for the branch likely instructions.
+#
+# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
+
+ .set noat
+ # CHECK: b 1332
+ # CHECK: nop
+ b 1332
+ # CHECK: bc1f 1332
+ # CHECK: nop
+ bc1f 1332
+ # CHECK: bc1t 1332
+ # CHECK: nop
+ bc1t 1332
+ # CHECK: beq $9, $6, 1332
+ # CHECK: nop
+ beq $9,$6,1332
+ # CHECK: bgez $6, 1332
+ # CHECK: nop
+ bgez $6,1332
+ # CHECK: bgezal $6, 1332
+ # CHECK: nop
+ bgezal $6,1332
+ # CHECK: bgtz $6, 1332
+ # CHECK: nop
+ bgtz $6,1332
+ # CHECK: blez $6, 1332
+ # CHECK: nop
+ blez $6,1332
+ # CHECK: bltz $6, 1332
+ # CHECK: nop
+ bltz $6,1332
+ # CHECK: bne $9, $6, 1332
+ # CHECK: nop
+ bne $9,$6,1332
+ # CHECK: bltzal $6, 1332
+ # CHECK: nop
+ bltzal $6,1332
+ # CHECK: bal 1332
+ # CHECK: nop
+ bal 1332
+ # CHECK: bnez $11, 1332
+ # CHECK: nop
+ bnez $11,1332
+ # CHECK: beqz $11, 1332
+ # CHECK: nop
+ beqz $11,1332
+
+ # CHECK: beql $9, $6, 1332
+ # CHECK-NOT: nop
+ beql $9,$6,1332
+ # CHECK: bnel $9, $6, 1332
+ # CHECK-NOT: nop
+ bnel $9,$6,1332
+ # CHECK: bgezl $6, 1332
+ # CHECK-NOT: nop
+ bgezl $6,1332
+ # CHECK: bgtzl $6, 1332
+ # CHECK-NOT: nop
+ bgtzl $6,1332
+ # CHECK: blezl $6, 1332
+ # CHECK-NOT: nop
+ blezl $6,1332
+ # CHECK: bltzl $6, 1332
+ # CHECK-NOT: nop
+ bltzl $6,1332
+ # CHECK: bgezall $6, 1332
+ # CHECK-NOT: nop
+ bgezall $6,1332
+ # CHECK: bltzall $6, 1332
+ # CHECK-NOT: nop
+ bltzall $6,1332
+
+ # CHECK: j 1328
+ # CHECK: nop
+ j 1328
+ # CHECK: jal 1328
+ # CHECK: nop
+ jal 1328
+ # CHECK: jalr $6
+ # CHECK: nop
+ jalr $6
+ # CHECK: jalr $25
+ # CHECK: nop
+ jalr $31,$25
+ # CHECK: jalr $10, $11
+ # CHECK: nop
+ jalr $10,$11
+ # CHECK: jr $7
+ # CHECK: nop
+ jr $7
+ # CHECK: jr $7
+ # CHECK: nop
+ j $7
+ # CHECK: jalr $25
+ # CHECK: nop
+ jal $25
+ # CHECK: jalr $4, $25
+ # CHECK: nop
+ jal $4,$25
+ # CHECK: jalx lab
+ # CHECK: nop
+ jalx lab
diff --git a/llvm/test/MC/Mips/mips1/invalid-mips2.s b/llvm/test/MC/Mips/mips1/invalid-mips2.s
index 50941de83be..9145f643288 100644
--- a/llvm/test/MC/Mips/mips1/invalid-mips2.s
+++ b/llvm/test/MC/Mips/mips1/invalid-mips2.s
@@ -5,6 +5,14 @@
# RUN: FileCheck %s < %t1
.set noat
+ beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
floor.w.d $f14,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/llvm/test/MC/Mips/mips2/valid.s b/llvm/test/MC/Mips/mips2/valid.s
index a260251801c..42fbeb3e24f 100644
--- a/llvm/test/MC/Mips/mips2/valid.s
+++ b/llvm/test/MC/Mips/mips2/valid.s
@@ -24,6 +24,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
diff --git a/llvm/test/MC/Mips/mips3/valid.s b/llvm/test/MC/Mips/mips3/valid.s
index f7d2dd9069f..fdd56e0e6c8 100644
--- a/llvm/test/MC/Mips/mips3/valid.s
+++ b/llvm/test/MC/Mips/mips3/valid.s
@@ -24,6 +24,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips32/valid.s b/llvm/test/MC/Mips/mips32/valid.s
index a696290b7f3..e50e311c90b 100644
--- a/llvm/test/MC/Mips/mips32/valid.s
+++ b/llvm/test/MC/Mips/mips32/valid.s
@@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s
index 847be1a8781..5d7f16ff4d1 100644
--- a/llvm/test/MC/Mips/mips32r2/valid.s
+++ b/llvm/test/MC/Mips/mips32r2/valid.s
@@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s b/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s
index e0ff4d84ff2..9b8a0881a65 100644
--- a/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s
+++ b/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s
@@ -6,14 +6,6 @@
# RUN: FileCheck %s < %t1
.set noat
- beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
diff --git a/llvm/test/MC/Mips/mips32r6/invalid-mips2.s b/llvm/test/MC/Mips/mips32r6/invalid-mips2.s
index bfa2c4c3ee7..7ba3cbf2fef 100644
--- a/llvm/test/MC/Mips/mips32r6/invalid-mips2.s
+++ b/llvm/test/MC/Mips/mips32r6/invalid-mips2.s
@@ -6,6 +6,14 @@
.set noat
addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/llvm/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s b/llvm/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s
index 53dcbb294da..e94b785ecda 100644
--- a/llvm/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s
+++ b/llvm/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s
@@ -6,14 +6,6 @@
# RUN: FileCheck %s < %t1
.set noat
- beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index 03031c8efa7..c93995e6c47 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s
index 5e510000141..ed3e7dd85bf 100644
--- a/llvm/test/MC/Mips/mips5/valid.s
+++ b/llvm/test/MC/Mips/mips5/valid.s
@@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s
index 1492057daa1..ba7e4b822c2 100644
--- a/llvm/test/MC/Mips/mips64/valid.s
+++ b/llvm/test/MC/Mips/mips64/valid.s
@@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s
index d4dd5399cb3..d3bd992f151 100644
--- a/llvm/test/MC/Mips/mips64r2/valid.s
+++ b/llvm/test/MC/Mips/mips64r2/valid.s
@@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
+ beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
+ bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
+ bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
+ bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
+ blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
+ bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
+ bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
+ bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
diff --git a/llvm/test/MC/Mips/mips64r6/invalid-mips2.s b/llvm/test/MC/Mips/mips64r6/invalid-mips2.s
index 8a5c50ca358..a8de62f57d5 100644
--- a/llvm/test/MC/Mips/mips64r6/invalid-mips2.s
+++ b/llvm/test/MC/Mips/mips64r6/invalid-mips2.s
@@ -6,9 +6,17 @@
.set noat
addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/llvm/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s b/llvm/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s
index 53dcbb294da..e94b785ecda 100644
--- a/llvm/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s
+++ b/llvm/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s
@@ -6,14 +6,6 @@
# RUN: FileCheck %s < %t1
.set noat
- beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
- bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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