[X86] Improve 64-bit shifts on 32-bit targets (PR14593)

As discussed on PR14593, this patch adds support for lowering to SHLD/SHRD from the patterns generated by DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

Differential Revision: https://reviews.llvm.org/D23000

llvm-svn: 277299

3 files changed, 42 insertions, 123 deletions

diff --git a/llvm/test/CodeGen/X86/legalize-shift-64.ll b/llvm/test/CodeGen/X86/legalize-shift-64.ll
index fff917f1bfa..4aabc69b0ff 100644
--- a/llvm/test/CodeGen/X86/legalize-shift-64.ll
+++ b/llvm/test/CodeGen/X86/legalize-shift-64.ll
@@ -24,19 +24,13 @@ define i64 @test2(i64 %xx, i32 %test) nounwind {
 ; CHECK-LABEL: test2:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %ch
-; CHECK-NEXT:    andb $7, %ch
-; CHECK-NEXT:    movb %ch, %cl
-; CHECK-NEXT:    shll %cl, %esi
-; CHECK-NEXT:    movl %eax, %edx
-; CHECK-NEXT:    shrl %edx
-; CHECK-NEXT:    xorb $31, %cl
-; CHECK-NEXT:    shrl %cl, %edx
-; CHECK-NEXT:    orl %esi, %edx
-; CHECK-NEXT:    movb %ch, %cl
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; CHECK-NEXT:    andb $7, %cl
+; CHECK-NEXT:    movl %esi, %eax
 ; CHECK-NEXT:    shll %cl, %eax
+; CHECK-NEXT:    shldl %cl, %esi, %edx
 ; CHECK-NEXT:    popl %esi
 ; CHECK-NEXT:    retl
   %and = and i32 %test, 7
@@ -48,20 +42,12 @@ define i64 @test2(i64 %xx, i32 %test) nounwind {
 define i64 @test3(i64 %xx, i32 %test) nounwind {
 ; CHECK-LABEL: test3:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %ch
-; CHECK-NEXT:    andb $7, %ch
-; CHECK-NEXT:    movb %ch, %cl
-; CHECK-NEXT:    shrl %cl, %esi
-; CHECK-NEXT:    leal (%edx,%edx), %eax
-; CHECK-NEXT:    xorb $31, %cl
-; CHECK-NEXT:    shll %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    movb %ch, %cl
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; CHECK-NEXT:    andb $7, %cl
+; CHECK-NEXT:    shrdl %cl, %edx, %eax
 ; CHECK-NEXT:    shrl %cl, %edx
-; CHECK-NEXT:    popl %esi
 ; CHECK-NEXT:    retl
   %and = and i32 %test, 7
   %sh_prom = zext i32 %and to i64
@@ -72,20 +58,12 @@ define i64 @test3(i64 %xx, i32 %test) nounwind {
 define i64 @test4(i64 %xx, i32 %test) nounwind {
 ; CHECK-LABEL: test4:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %ch
-; CHECK-NEXT:    andb $7, %ch
-; CHECK-NEXT:    movb %ch, %cl
-; CHECK-NEXT:    shrl %cl, %esi
-; CHECK-NEXT:    leal (%edx,%edx), %eax
-; CHECK-NEXT:    xorb $31, %cl
-; CHECK-NEXT:    shll %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    movb %ch, %cl
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; CHECK-NEXT:    andb $7, %cl
+; CHECK-NEXT:    shrdl %cl, %edx, %eax
 ; CHECK-NEXT:    sarl %cl, %edx
-; CHECK-NEXT:    popl %esi
 ; CHECK-NEXT:    retl
   %and = and i32 %test, 7
   %sh_prom = zext i32 %and to i64
diff --git a/llvm/test/CodeGen/X86/shift-double-x86_64.ll b/llvm/test/CodeGen/X86/shift-double-x86_64.ll
index 706f066f21b..28f6731e25e 100644
--- a/llvm/test/CodeGen/X86/shift-double-x86_64.ll
+++ b/llvm/test/CodeGen/X86/shift-double-x86_64.ll
@@ -67,13 +67,7 @@ define i64 @test5(i64 %hi, i64 %lo, i64 %bits) nounwind {
 ; CHECK-LABEL: test5:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    xorl $63, %ecx
-; CHECK-NEXT:    shrq %rsi
-; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT:    shrq %cl, %rsi
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    shlq %cl, %rdi
-; CHECK-NEXT:    orq %rsi, %rdi
+; CHECK-NEXT:    shldq %cl, %rsi, %rdi
 ; CHECK-NEXT:    movq %rdi, %rax
 ; CHECK-NEXT:    retq
   %bits64 = xor i64 %bits, 63
@@ -88,13 +82,8 @@ define i64 @test6(i64 %hi, i64 %lo, i64 %bits) nounwind {
 ; CHECK-LABEL: test6:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    xorl $63, %ecx
-; CHECK-NEXT:    leaq (%rsi,%rsi), %rax
-; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT:    shlq %cl, %rax
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    shrq %cl, %rdi
-; CHECK-NEXT:    orq %rdi, %rax
+; CHECK-NEXT:    shrdq %cl, %rsi, %rdi
+; CHECK-NEXT:    movq %rdi, %rax
 ; CHECK-NEXT:    retq
   %bits64 = xor i64 %bits, 63
   %lo2 = shl i64 %lo, 1
@@ -108,13 +97,8 @@ define i64 @test7(i64 %hi, i64 %lo, i64 %bits) nounwind {
 ; CHECK-LABEL: test7:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    xorl $63, %ecx
-; CHECK-NEXT:    leaq (%rsi,%rsi), %rax
-; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT:    shlq %cl, %rax
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    shrq %cl, %rdi
-; CHECK-NEXT:    orq %rdi, %rax
+; CHECK-NEXT:    shrdq %cl, %rsi, %rdi
+; CHECK-NEXT:    movq %rdi, %rax
 ; CHECK-NEXT:    retq
   %bits64 = xor i64 %bits, 63
   %lo2 = add i64 %lo, %lo
diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll
index 0cb6a575255..ba9baea9862 100644
--- a/llvm/test/CodeGen/X86/shift-double.ll
+++ b/llvm/test/CodeGen/X86/shift-double.ll
@@ -151,19 +151,13 @@ define i64 @test8(i64 %val, i32 %bits) nounwind {
 ; CHECK-LABEL: test8:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %ch
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT:    movb %ch, %cl
-; CHECK-NEXT:    shll %cl, %esi
-; CHECK-NEXT:    movl %eax, %edx
-; CHECK-NEXT:    shrl %edx
-; CHECK-NEXT:    andb $31, %cl
-; CHECK-NEXT:    xorb $31, %cl
-; CHECK-NEXT:    shrl %cl, %edx
-; CHECK-NEXT:    orl %esi, %edx
-; CHECK-NEXT:    movb %ch, %cl
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    movl %esi, %eax
 ; CHECK-NEXT:    shll %cl, %eax
+; CHECK-NEXT:    andb $31, %cl
+; CHECK-NEXT:    shldl %cl, %esi, %edx
 ; CHECK-NEXT:    popl %esi
 ; CHECK-NEXT:    retl
   %and = and i32 %bits, 31
@@ -176,18 +170,13 @@ define i64 @test9(i64 %val, i32 %bits) nounwind {
 ; CHECK-LABEL: test9:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %ch
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movb %ch, %cl
-; CHECK-NEXT:    shrl %cl, %esi
-; CHECK-NEXT:    leal (%edx,%edx), %eax
-; CHECK-NEXT:    andb $31, %cl
-; CHECK-NEXT:    xorb $31, %cl
-; CHECK-NEXT:    shll %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    movb %ch, %cl
+; CHECK-NEXT:    movl %esi, %edx
 ; CHECK-NEXT:    sarl %cl, %edx
+; CHECK-NEXT:    andb $31, %cl
+; CHECK-NEXT:    shrdl %cl, %esi, %eax
 ; CHECK-NEXT:    popl %esi
 ; CHECK-NEXT:    retl
   %and = and i32 %bits, 31
@@ -200,18 +189,13 @@ define i64 @test10(i64 %val, i32 %bits) nounwind {
 ; CHECK-LABEL: test10:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %ch
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movb %ch, %cl
-; CHECK-NEXT:    shrl %cl, %esi
-; CHECK-NEXT:    leal (%edx,%edx), %eax
-; CHECK-NEXT:    andb $31, %cl
-; CHECK-NEXT:    xorb $31, %cl
-; CHECK-NEXT:    shll %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    movb %ch, %cl
+; CHECK-NEXT:    movl %esi, %edx
 ; CHECK-NEXT:    shrl %cl, %edx
+; CHECK-NEXT:    andb $31, %cl
+; CHECK-NEXT:    shrdl %cl, %esi, %eax
 ; CHECK-NEXT:    popl %esi
 ; CHECK-NEXT:    retl
   %and = and i32 %bits, 31
@@ -291,19 +275,10 @@ define i32 @test14(i32 %hi, i32 %lo, i32 %bits) nounwind {
 define i32 @test15(i32 %hi, i32 %lo, i32 %bits) nounwind {
 ; CHECK-LABEL: test15:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    xorl $31, %ecx
-; CHECK-NEXT:    shrl %esi
-; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT:    shrl %cl, %esi
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    shll %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    shldl %cl, %edx, %eax
 ; CHECK-NEXT:    retl
   %bits32 = xor i32 %bits, 31
   %lo2 = lshr i32 %lo, 1
@@ -316,19 +291,10 @@ define i32 @test15(i32 %hi, i32 %lo, i32 %bits) nounwind {
 define i32 @test16(i32 %hi, i32 %lo, i32 %bits) nounwind {
 ; CHECK-LABEL: test16:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    xorl $31, %ecx
-; CHECK-NEXT:    addl %esi, %esi
-; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT:    shll %cl, %esi
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    shrl %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    shrdl %cl, %edx, %eax
 ; CHECK-NEXT:    retl
   %bits32 = xor i32 %bits, 31
   %lo2 = shl i32 %lo, 1
@@ -341,19 +307,10 @@ define i32 @test16(i32 %hi, i32 %lo, i32 %bits) nounwind {
 define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind {
 ; CHECK-LABEL: test17:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    pushl %esi
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    xorl $31, %ecx
-; CHECK-NEXT:    addl %esi, %esi
-; CHECK-NEXT:    # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT:    shll %cl, %esi
-; CHECK-NEXT:    movl %edx, %ecx
-; CHECK-NEXT:    shrl %cl, %eax
-; CHECK-NEXT:    orl %esi, %eax
-; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    shrdl %cl, %edx, %eax
 ; CHECK-NEXT:    retl
   %bits32 = xor i32 %bits, 31
   %lo2 = add i32 %lo, %lo