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| author | Ana Pazos <apazos@codeaurora.org> | 2018-08-30 19:43:19 +0000 |
|---|---|---|
| committer | Ana Pazos <apazos@codeaurora.org> | 2018-08-30 19:43:19 +0000 |
| commit | 6b34051b3370b409e9081345b98005cb43b0a22e (patch) | |
| tree | 082fc7e1d770df80971b9d0c6c333cd7a16e4f63 /llvm/test | |
| parent | 6666861158de68dfdcd2eddf0433f5dbc1a3acef (diff) | |
| download | bcm5719-llvm-6b34051b3370b409e9081345b98005cb43b0a22e.tar.gz bcm5719-llvm-6b34051b3370b409e9081345b98005cb43b0a22e.zip | |
[RISCV] Fixed SmallVector.h Assertion `idx < size()'
Summary:
RISCVAsmParser needs to handle the case the error message is of specific type, other than the generic Match_InvalidOperand, and the corresponding
operand is missing.
This bug was uncovered by a LLVM MC Assembler Protocol Buffer Fuzzer for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: llvm-commits, jocewei, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX
Differential Revision: https://reviews.llvm.org/D50790
llvm-svn: 341104
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/RISCV/rv32i-invalid.s | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/MC/RISCV/rv32i-invalid.s b/llvm/test/MC/RISCV/rv32i-invalid.s index aa1ce4011bf..f78680602be 100644 --- a/llvm/test/MC/RISCV/rv32i-invalid.s +++ b/llvm/test/MC/RISCV/rv32i-invalid.s @@ -138,6 +138,8 @@ lw a4, a5, 111 # CHECK: :[[@LINE]]:8: error: immediate must be an integer in the # Too few operands ori a0, a1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction xor s2, s2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction +# FIXME: Fix jal behavior to interpret a3 as a symbol rather than a register. +jal a3 # CHECK: :[[@LINE]]:1: error: too few operands for instruction # Instruction not in the base ISA mul a4, ra, s0 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled |
