diff options
| author | Jim Grosbach <grosbach@apple.com> | 2013-08-22 00:14:24 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2013-08-22 00:14:24 +0000 |
| commit | 6a7a727174830d448cfcede4090ab7edc3b6d19a (patch) | |
| tree | 83d8cf956694ae836c084b63776d0a56e53d18fc /llvm/test | |
| parent | b4fae7c3d036da77f63c67d4453ac6df241f2af2 (diff) | |
| download | bcm5719-llvm-6a7a727174830d448cfcede4090ab7edc3b6d19a.tar.gz bcm5719-llvm-6a7a727174830d448cfcede4090ab7edc3b6d19a.zip | |
ARM: R9 is not safe to use for tcGPR.
Indirect tail-calls shouldn't use R9 for the branch destination, as
it's not reliably a call-clobbered register.
rdar://14793425
llvm-svn: 188967
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/Thumb2/tail-call-r9.ll | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Thumb2/tail-call-r9.ll b/llvm/test/CodeGen/Thumb2/tail-call-r9.ll new file mode 100644 index 00000000000..24c76c98c03 --- /dev/null +++ b/llvm/test/CodeGen/Thumb2/tail-call-r9.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 | FileCheck %s + +@foo = common global void ()* null, align 4 + +; Make sure in the presence of a tail call, r9 doesn't get used to hold +; the destination address. It's callee-saved in AAPCS. +define arm_aapcscc void @test(i32 %a) nounwind { +; CHECK-LABEL: test: +; CHECK-NOT bx r9 + %tmp = load void ()** @foo, align 4 + tail call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r12}"() nounwind + tail call arm_aapcscc void %tmp() nounwind + ret void +} |
