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| author | Hans Wennborg <hans@hanshq.net> | 2016-04-06 16:44:38 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@hanshq.net> | 2016-04-06 16:44:38 +0000 |
| commit | 6849f8f15f4fd874d0a7de4aaac65b1ad374912c (patch) | |
| tree | 304e4d0620d0a5704e4b6d693c22a34fadf50512 /llvm/test | |
| parent | 16332ba861f9266a43ebabf5068e7e9091202870 (diff) | |
| download | bcm5719-llvm-6849f8f15f4fd874d0a7de4aaac65b1ad374912c.tar.gz bcm5719-llvm-6849f8f15f4fd874d0a7de4aaac65b1ad374912c.zip | |
Revert r265450 "[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC."
It caused ASan 32-bit tests to hang (PR27245).
llvm-svn: 265559
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/atomic-eflags-reuse.ll | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll b/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll index 18581b47d11..152d7e0ea71 100644 --- a/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll +++ b/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll @@ -4,7 +4,9 @@ define i8 @test_add_1_setcc_ne(i64* %p) #0 { ; CHECK-LABEL: test_add_1_setcc_ne: ; CHECK: # BB#0: # %entry -; CHECK-NEXT: lock incq (%rdi) +; CHECK-NEXT: movl $1, %eax +; CHECK-NEXT: lock xaddq %rax, (%rdi) +; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: setne %al ; CHECK-NEXT: retq entry: @@ -17,7 +19,9 @@ entry: define i8 @test_sub_1_setcc_eq(i64* %p) #0 { ; CHECK-LABEL: test_sub_1_setcc_eq: ; CHECK: # BB#0: # %entry -; CHECK-NEXT: lock decq (%rdi) +; CHECK-NEXT: movq $-1, %rax +; CHECK-NEXT: lock xaddq %rax, (%rdi) +; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: sete %al ; CHECK-NEXT: retq entry: @@ -45,7 +49,9 @@ entry: define i8 @test_sub_10_setcc_sge(i64* %p) #0 { ; CHECK-LABEL: test_sub_10_setcc_sge: ; CHECK: # BB#0: # %entry -; CHECK-NEXT: lock addq $-10, (%rdi) +; CHECK-NEXT: movq $-10, %rax +; CHECK-NEXT: lock xaddq %rax, (%rdi) +; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: setns %al ; CHECK-NEXT: retq entry: @@ -60,7 +66,9 @@ entry: define i32 @test_add_10_brcond_sge(i64* %p, i32 %a0, i32 %a1) #0 { ; CHECK-LABEL: test_add_10_brcond_sge: ; CHECK: # BB#0: # %entry -; CHECK-NEXT: lock addq $10, (%rdi) +; CHECK-NEXT: movl $10, %eax +; CHECK-NEXT: lock xaddq %rax, (%rdi) +; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: js .LBB4_2 ; CHECK-NEXT: # BB#1: # %t ; CHECK-NEXT: movl %esi, %eax @@ -81,7 +89,9 @@ f: define i32 @test_sub_1_cmov_slt(i64* %p, i32 %a0, i32 %a1) #0 { ; CHECK-LABEL: test_sub_1_cmov_slt: ; CHECK: # BB#0: # %entry -; CHECK-NEXT: lock decq (%rdi) +; CHECK-NEXT: movq $-1, %rax +; CHECK-NEXT: lock xaddq %rax, (%rdi) +; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: cmovnsl %edx, %esi ; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: retq |
