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authorHrvoje Varga <Hrvoje.Varga@imgtec.com>2015-12-02 09:31:24 +0000
committerHrvoje Varga <Hrvoje.Varga@imgtec.com>2015-12-02 09:31:24 +0000
commit672b0f558248341f3e69bba5eadd9c6dab32be7f (patch)
treee648a4250204def1ba03f26ccb412593aa05160b /llvm/test
parent3fc3454a0c84de7e7f5a19714680f9606e436c89 (diff)
downloadbcm5719-llvm-672b0f558248341f3e69bba5eadd9c6dab32be7f.tar.gz
bcm5719-llvm-672b0f558248341f3e69bba5eadd9c6dab32be7f.zip
[mips][microMIPS] Implement PREPEND, RADDU.W.QB, RDDSP, REPL.PH, REPL.QB, REPLV.PH, REPLV.QB and MTHLIP instructions
Differential Revision: http://reviews.llvm.org/D14527 llvm-svn: 254496
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt7
-rw-r--r--llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt1
-rw-r--r--llvm/test/MC/Mips/micromips-dsp/valid.s7
-rw-r--r--llvm/test/MC/Mips/micromips-dspr2/valid.s1
4 files changed, 16 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
index ceba6a9823b..7fef4e2d08c 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
@@ -87,3 +87,10 @@
0x00 0x01 0x50 0x7c # CHECK: mflo $1, $ac1
0x00 0x01 0x60 0x7c # CHECK: mthi $1, $ac1
0x00 0x01 0x70 0x7c # CHECK: mtlo $1, $ac1
+0x00 0x22 0xf1 0x3c # CHECK: raddu.w.qb $1, $2
+0x00 0x20 0x86 0x7c # CHECK: rddsp $1, 2
+0x02 0x00 0x08 0x3d # CHECK: repl.ph $1, 512
+0x00 0x30 0x05 0xfc # CHECK: repl.qb $1, 128
+0x00 0x22 0x03 0x3c # CHECK: replv.ph $1, $2
+0x00 0x22 0x13 0x3c # CHECK: replv.qb $1, $2
+0x00 0x01 0x82 0x7c # CHECK: mthlip $1, $ac2
diff --git a/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
index 8049e0e3174..096b5bda4a3 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
@@ -115,3 +115,4 @@
0x00 0x62 0x08 0x95 # CHECK: muleu_s.ph.qbl $1, $2, $3
0x00 0x62 0x08 0xd5 # CHECK: muleu_s.ph.qbr $1, $2, $3
0x00,0x62,0x09,0x15 # CHECK: mulq_rs.ph $1, $2, $3
+0x00 0x22 0x1a 0x55 # CHECK: prepend $1, $2, 3
diff --git a/llvm/test/MC/Mips/micromips-dsp/valid.s b/llvm/test/MC/Mips/micromips-dsp/valid.s
index f2eae8f6cae..85e3cd6f4b9 100644
--- a/llvm/test/MC/Mips/micromips-dsp/valid.s
+++ b/llvm/test/MC/Mips/micromips-dsp/valid.s
@@ -88,3 +88,10 @@
mflo $1, $ac1 # CHECK: mflo $1, $ac1 # encoding: [0x00,0x01,0x50,0x7c]
mthi $1, $ac1 # CHECK: mthi $1, $ac1 # encoding: [0x00,0x01,0x60,0x7c]
mtlo $1, $ac1 # CHECK: mtlo $1, $ac1 # encoding: [0x00,0x01,0x70,0x7c]
+ raddu.w.qb $1, $2 # CHECK: raddu.w.qb $1, $2 # encoding: [0x00,0x22,0xf1,0x3c]
+ rddsp $1, 2 # CHECK: rddsp $1, 2 # encoding: [0x00,0x20,0x86,0x7c]
+ repl.ph $1, 512 # CHECK: repl.ph $1, 512 # encoding: [0x02,0x00,0x08,0x3d]
+ repl.qb $1, 128 # CHECK: repl.qb $1, 128 # encoding: [0x00,0x30,0x05,0xfc]
+ replv.ph $1, $2 # CHECK: replv.ph $1, $2 # encoding: [0x00,0x22,0x03,0x3c]
+ replv.qb $1, $2 # CHECK: replv.qb $1, $2 # encoding: [0x00,0x22,0x13,0x3c]
+ mthlip $1, $ac2 # CHECK: mthlip $1, $ac2 # encoding: [0x00,0x01,0x82,0x7c]
diff --git a/llvm/test/MC/Mips/micromips-dspr2/valid.s b/llvm/test/MC/Mips/micromips-dspr2/valid.s
index 3035ae5ba81..b236aea152a 100644
--- a/llvm/test/MC/Mips/micromips-dspr2/valid.s
+++ b/llvm/test/MC/Mips/micromips-dspr2/valid.s
@@ -116,3 +116,4 @@
muleu_s.ph.qbl $1, $2, $3 # CHECK: muleu_s.ph.qbl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x95]
muleu_s.ph.qbr $1, $2, $3 # CHECK: muleu_s.ph.qbr $1, $2, $3 # encoding: [0x00,0x62,0x08,0xd5]
mulq_rs.ph $1, $2, $3 # CHECK: mulq_rs.ph $1, $2, $3 # encoding: [0x00,0x62,0x09,0x15]
+ prepend $1, $2, 3 # CHECK: prepend $1, $2, 3 # encoding: [0x00,0x22,0x1a,0x55]
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