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| author | Jessica Paquette <jpaquette@apple.com> | 2018-04-03 21:56:10 +0000 |
|---|---|---|
| committer | Jessica Paquette <jpaquette@apple.com> | 2018-04-03 21:56:10 +0000 |
| commit | 642f6c61a3dcc1d9f66e31e2e1f3f72838dc1233 (patch) | |
| tree | 88d387027af04c61676674cad3772931b881ad2e /llvm/test | |
| parent | 936947349aee60900c3c4eaf4cfa5deb377d37a2 (diff) | |
| download | bcm5719-llvm-642f6c61a3dcc1d9f66e31e2e1f3f72838dc1233.tar.gz bcm5719-llvm-642f6c61a3dcc1d9f66e31e2e1f3f72838dc1233.zip | |
[MachineOutliner] Keep track of fns that use a redzone in AArch64FunctionInfo
This patch adds a hasRedZone() function to AArch64MachineFunctionInfo. It
returns true if the function is known to use a redzone, false if it is known
to not use a redzone, and no value otherwise.
This removes the requirement to pass -mno-red-zone when outlining for AArch64.
https://reviews.llvm.org/D45189
llvm-svn: 329120
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/machine-outliner-noredzone.ll | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-noredzone.ll b/llvm/test/CodeGen/AArch64/machine-outliner-noredzone.ll new file mode 100644 index 00000000000..504f8a8802b --- /dev/null +++ b/llvm/test/CodeGen/AArch64/machine-outliner-noredzone.ll @@ -0,0 +1,47 @@ +; RUN: llc -enable-machine-outliner %s -o - | FileCheck %s +; CHECK: OUTLINED_FUNCTION +; RUN: llc -enable-machine-outliner -aarch64-redzone %s -o - | FileCheck %s -check-prefix=REDZONE +; REDZONE-NOT: OUTLINED_FUNCTION + +target triple = "arm64----" + +; Ensure that the MachineOutliner does not fire on functions which use a +; redzone. foo() should have a redzone when compiled with -aarch64-redzone, and +; no redzone otherwise. +define void @foo() #0 { + %1 = alloca i32, align 4 + %2 = alloca i32, align 4 + %3 = alloca i32, align 4 + %4 = alloca i32, align 4 + store i32 0, i32* %1, align 4 + store i32 0, i32* %2, align 4 + store i32 0, i32* %3, align 4 + store i32 0, i32* %4, align 4 + %5 = load i32, i32* %1, align 4 + %6 = add nsw i32 %5, 1 + store i32 %6, i32* %1, align 4 + %7 = load i32, i32* %3, align 4 + %8 = add nsw i32 %7, 1 + store i32 %8, i32* %3, align 4 + %9 = load i32, i32* %4, align 4 + %10 = add nsw i32 %9, 1 + store i32 %10, i32* %4, align 4 + %11 = load i32, i32* %2, align 4 + %12 = add nsw i32 %11, 1 + store i32 %12, i32* %2, align 4 + %13 = load i32, i32* %1, align 4 + %14 = add nsw i32 %13, 1 + store i32 %14, i32* %1, align 4 + %15 = load i32, i32* %3, align 4 + %16 = add nsw i32 %15, 1 + store i32 %16, i32* %3, align 4 + %17 = load i32, i32* %4, align 4 + %18 = add nsw i32 %17, 1 + store i32 %18, i32* %4, align 4 + %19 = load i32, i32* %2, align 4 + %20 = add nsw i32 %19, -1 + store i32 %20, i32* %2, align 4 + ret void +} + +attributes #0 = { noinline nounwind optnone } |

