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| author | Vladimir Sukharev <vladimir.sukharev@arm.com> | 2015-04-16 15:38:58 +0000 |
|---|---|---|
| committer | Vladimir Sukharev <vladimir.sukharev@arm.com> | 2015-04-16 15:38:58 +0000 |
| commit | 6334cf3d697a326a1a1af91c1f8c5de394cf80c0 (patch) | |
| tree | 0cdc6be44a6477e43cc5fd9a9663ac3464923614 /llvm/test | |
| parent | 87bb04e8099d94b03469e487391f3bf10cb79420 (diff) | |
| download | bcm5719-llvm-6334cf3d697a326a1a1af91c1f8c5de394cf80c0.tar.gz bcm5719-llvm-6334cf3d697a326a1a1af91c1f8c5de394cf80c0.zip | |
[AArch64] Add v8.1a "Virtualization Host Extensions"
Reviewers: t.p.northover
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8500
Patch by: Tom Coxon
llvm-svn: 235107
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/AArch64/armv8.1a-vhe.s | 61 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/armv8.1a-vhe.txt | 56 |
2 files changed, 117 insertions, 0 deletions
diff --git a/llvm/test/MC/AArch64/armv8.1a-vhe.s b/llvm/test/MC/AArch64/armv8.1a-vhe.s new file mode 100644 index 00000000000..2bee4e21329 --- /dev/null +++ b/llvm/test/MC/AArch64/armv8.1a-vhe.s @@ -0,0 +1,61 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.1a < %s | FileCheck %s + + +//------------------------------------------------------------------------------ +// Virtualization Host Extensions +//------------------------------------------------------------------------------ + msr TTBR1_EL2, x0 + msr CONTEXTIDR_EL2, x0 + msr CNTHV_TVAL_EL2, x0 + msr CNTHV_CVAL_EL2, x0 + msr CNTHV_CTL_EL2, x0 + msr SCTLR_EL12, x0 + msr CPACR_EL12, x0 + msr TTBR0_EL12, x0 + msr TTBR1_EL12, x0 + msr TCR_EL12, x0 + msr AFSR0_EL12, x0 + msr AFSR1_EL12, x0 + msr ESR_EL12, x0 + msr FAR_EL12, x0 + msr MAIR_EL12, x0 + msr AMAIR_EL12, x0 + msr VBAR_EL12, x0 + msr CONTEXTIDR_EL12, x0 + msr CNTKCTL_EL12, x0 + msr CNTP_TVAL_EL02, x0 + msr CNTP_CTL_EL02, x0 + msr CNTP_CVAL_EL02, x0 + msr CNTV_TVAL_EL02, x0 + msr CNTV_CTL_EL02, x0 + msr CNTV_CVAL_EL02, x0 + msr SPSR_EL12, x0 + msr ELR_EL12, x0 + +// CHECK: msr TTBR1_EL2, x0 // encoding: [0x20,0x20,0x1c,0xd5] +// CHECK: msr CONTEXTIDR_EL2, x0 // encoding: [0x20,0xd0,0x1c,0xd5] +// CHECK: msr CNTHV_TVAL_EL2, x0 // encoding: [0x00,0xe3,0x1c,0xd5] +// CHECK: msr CNTHV_CVAL_EL2, x0 // encoding: [0x40,0xe3,0x1c,0xd5] +// CHECK: msr CNTHV_CTL_EL2, x0 // encoding: [0x20,0xe3,0x1c,0xd5] +// CHECK: msr SCTLR_EL12, x0 // encoding: [0x00,0x10,0x1d,0xd5] +// CHECK: msr CPACR_EL12, x0 // encoding: [0x40,0x10,0x1d,0xd5] +// CHECK: msr TTBR0_EL12, x0 // encoding: [0x00,0x20,0x1d,0xd5] +// CHECK: msr TTBR1_EL12, x0 // encoding: [0x20,0x20,0x1d,0xd5] +// CHECK: msr TCR_EL12, x0 // encoding: [0x40,0x20,0x1d,0xd5] +// CHECK: msr AFSR0_EL12, x0 // encoding: [0x00,0x51,0x1d,0xd5] +// CHECK: msr AFSR1_EL12, x0 // encoding: [0x20,0x51,0x1d,0xd5] +// CHECK: msr ESR_EL12, x0 // encoding: [0x00,0x52,0x1d,0xd5] +// CHECK: msr FAR_EL12, x0 // encoding: [0x00,0x60,0x1d,0xd5] +// CHECK: msr MAIR_EL12, x0 // encoding: [0x00,0xa2,0x1d,0xd5] +// CHECK: msr AMAIR_EL12, x0 // encoding: [0x00,0xa3,0x1d,0xd5] +// CHECK: msr VBAR_EL12, x0 // encoding: [0x00,0xc0,0x1d,0xd5] +// CHECK: msr CONTEXTIDR_EL12, x0 // encoding: [0x20,0xd0,0x1d,0xd5] +// CHECK: msr CNTKCTL_EL12, x0 // encoding: [0x00,0xe1,0x1d,0xd5] +// CHECK: msr CNTP_TVAL_EL02, x0 // encoding: [0x00,0xe2,0x1d,0xd5] +// CHECK: msr CNTP_CTL_EL02, x0 // encoding: [0x20,0xe2,0x1d,0xd5] +// CHECK: msr CNTP_CVAL_EL02, x0 // encoding: [0x40,0xe2,0x1d,0xd5] +// CHECK: msr CNTV_TVAL_EL02, x0 // encoding: [0x00,0xe3,0x1d,0xd5] +// CHECK: msr CNTV_CTL_EL02, x0 // encoding: [0x20,0xe3,0x1d,0xd5] +// CHECK: msr CNTV_CVAL_EL02, x0 // encoding: [0x40,0xe3,0x1d,0xd5] +// CHECK: msr SPSR_EL12, x0 // encoding: [0x00,0x40,0x1d,0xd5] +// CHECK: msr ELR_EL12, x0 // encoding: [0x20,0x40,0x1d,0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.1a-vhe.txt b/llvm/test/MC/Disassembler/AArch64/armv8.1a-vhe.txt new file mode 100644 index 00000000000..e4bf59c2b32 --- /dev/null +++ b/llvm/test/MC/Disassembler/AArch64/armv8.1a-vhe.txt @@ -0,0 +1,56 @@ +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a --disassemble < %s | FileCheck %s + +0x20,0x20,0x1c,0xd5 +0x20,0xd0,0x1c,0xd5 +0x00,0xe3,0x1c,0xd5 +0x40,0xe3,0x1c,0xd5 +0x20,0xe3,0x1c,0xd5 +0x00,0x10,0x1d,0xd5 +0x40,0x10,0x1d,0xd5 +0x00,0x20,0x1d,0xd5 +0x20,0x20,0x1d,0xd5 +0x40,0x20,0x1d,0xd5 +0x00,0x51,0x1d,0xd5 +0x20,0x51,0x1d,0xd5 +0x00,0x52,0x1d,0xd5 +0x00,0x60,0x1d,0xd5 +0x00,0xa2,0x1d,0xd5 +0x00,0xa3,0x1d,0xd5 +0x00,0xc0,0x1d,0xd5 +0x20,0xd0,0x1d,0xd5 +0x00,0xe1,0x1d,0xd5 +0x00,0xe2,0x1d,0xd5 +0x20,0xe2,0x1d,0xd5 +0x40,0xe2,0x1d,0xd5 +0x00,0xe3,0x1d,0xd5 +0x20,0xe3,0x1d,0xd5 +0x40,0xe3,0x1d,0xd5 +0x00,0x40,0x1d,0xd5 +0x20,0x40,0x1d,0xd5 +# CHECK: msr TTBR1_EL2, x0 +# CHECK: msr CONTEXTIDR_EL2, x0 +# CHECK: msr CNTHV_TVAL_EL2, x0 +# CHECK: msr CNTHV_CVAL_EL2, x0 +# CHECK: msr CNTHV_CTL_EL2, x0 +# CHECK: msr SCTLR_EL12, x0 +# CHECK: msr CPACR_EL12, x0 +# CHECK: msr TTBR0_EL12, x0 +# CHECK: msr TTBR1_EL12, x0 +# CHECK: msr TCR_EL12, x0 +# CHECK: msr AFSR0_EL12, x0 +# CHECK: msr AFSR1_EL12, x0 +# CHECK: msr ESR_EL12, x0 +# CHECK: msr FAR_EL12, x0 +# CHECK: msr MAIR_EL12, x0 +# CHECK: msr AMAIR_EL12, x0 +# CHECK: msr VBAR_EL12, x0 +# CHECK: msr CONTEXTIDR_EL12, x0 +# CHECK: msr CNTKCTL_EL12, x0 +# CHECK: msr CNTP_TVAL_EL02, x0 +# CHECK: msr CNTP_CTL_EL02, x0 +# CHECK: msr CNTP_CVAL_EL02, x0 +# CHECK: msr CNTV_TVAL_EL02, x0 +# CHECK: msr CNTV_CTL_EL02, x0 +# CHECK: msr CNTV_CVAL_EL02, x0 +# CHECK: msr SPSR_EL12, x0 +# CHECK: msr ELR_EL12, x0 |
