[mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions

Differential Revision: http://reviews.llvm.org/D17334

llvm-svn: 265002

6 files changed, 44 insertions, 14 deletions

diff --git a/llvm/test/MC/Disassembler/Mips/micromips32r6/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips32r6/valid.txt
index bf78c046dd1..1802177c7dc 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips32r6/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips32r6/valid.txt
@@ -268,3 +268,11 @@
 0x01 0x2a 0x0a 0xf4 # CHECK: mthc0 $9, $10, 1
 0x55 0x6c 0x38 0x3b # CHECK: mthc1 $11, $f12
 0x01 0xae 0x9d 0x3c # CHECK: mthc2 $13, $14
+0x00 0x67 0x00 0xfc # CHECK: mfc0 $3, $7, 0
+0x00 0x67 0x18 0xfc # CHECK: mfc0 $3, $7, 3
+0x54 0xaa 0x20 0x3b # CHECK: mfc1 $5, $f10
+0x01 0xe5 0x4d 0x3c # CHECK: mfc2 $15, $5
+0x02 0x95 0x00 0xf4 # CHECK: mfhc0 $20, $21, 0
+0x00 0x22 0x08 0xf4 # CHECK: mfhc0 $1, $2, 1
+0x54 0x06 0x30 0x3b # CHECK: mfhc1 $zero, $f6
+0x02 0xf0 0x8d 0x3c # CHECK: mfhc2 $23, $16
diff --git a/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
index 36c33f547d0..068c3ae0457 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
@@ -189,3 +189,7 @@
 0x5a 0x32 0x2a 0xfc # CHECK: dmtc0 $17, $18, 5
 0x56 0x74 0x2c 0x3b # CHECK: dmtc1 $19, $f20
 0x02 0xb6 0x7d 0x3c # CHECK: dmtc2 $21, $22
+0x5a 0x51 0x00 0xfc # CHECK: dmfc0 $18, $17
+0x59 0x21 0x08 0xfc # CHECK: dmfc0 $9, $1, 1
+0x55 0x24 0x24 0x3b # CHECK: dmfc1 $9, $f4
+0x01 0xd2 0x6d 0x3c # CHECK: dmfc2 $14, $18
diff --git a/llvm/test/MC/Mips/micromips32r6/invalid.s b/llvm/test/MC/Mips/micromips32r6/invalid.s
index e3142a263a3..78b0cb265b5 100644
--- a/llvm/test/MC/Mips/micromips32r6/invalid.s
+++ b/llvm/test/MC/Mips/micromips32r6/invalid.s
@@ -114,3 +114,7 @@
   mtc0  $4, $3, 8          # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
   mthc0 $4, $3, -1         # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
   mthc0 $4, $3, 8          # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mfc0  $4, $3, -1         # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mfc0  $4, $3, 8          # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mfhc0 $4, $3, -1         # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mfhc0 $4, $3, 8          # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
diff --git a/llvm/test/MC/Mips/micromips32r6/valid.s b/llvm/test/MC/Mips/micromips32r6/valid.s
index b80f62c9b69..abcec55afb7 100644
--- a/llvm/test/MC/Mips/micromips32r6/valid.s
+++ b/llvm/test/MC/Mips/micromips32r6/valid.s
@@ -259,11 +259,19 @@
   deret                    # CHECK: deret                  # encoding: [0x00,0x00,0xe3,0x7c]
   tlbinv                   # CHECK: tlbinv                 # encoding: [0x00,0x00,0x43,0x7c]
   tlbinvf                  # CHECK: tlbinvf                # encoding: [0x00,0x00,0x53,0x7c]
-  mtc0 $5, $9              # CHECK: mtc0 $5, $9, 0      # encoding: [0x00,0xa9,0x02,0xfc]
-  mtc0 $1, $2, 7           # CHECK: mtc0 $1, $2, 7      # encoding: [0x00,0x22,0x3a,0xfc]
-  mtc1 $3, $f4             # CHECK: mtc1 $3, $f4        # encoding: [0x54,0x64,0x28,0x3b]
-  mtc2 $5, $6              # CHECK: mtc2 $5, $6         # encoding: [0x00,0xa6,0x5d,0x3c]
-  mthc0 $7, $8             # CHECK: mthc0 $7, $8, 0     # encoding: [0x00,0xe8,0x02,0xf4]
-  mthc0 $9, $10, 1         # CHECK: mthc0 $9, $10, 1    # encoding: [0x01,0x2a,0x0a,0xf4]
-  mthc1 $11, $f12          # CHECK: mthc1 $11, $f12     # encoding: [0x55,0x6c,0x38,0x3b]
-  mthc2 $13, $14           # CHECK: mthc2 $13, $14      # encoding: [0x01,0xae,0x9d,0x3c]
+  mtc0 $5, $9              # CHECK: mtc0 $5, $9, 0         # encoding: [0x00,0xa9,0x02,0xfc]
+  mtc0 $1, $2, 7           # CHECK: mtc0 $1, $2, 7         # encoding: [0x00,0x22,0x3a,0xfc]
+  mtc1 $3, $f4             # CHECK: mtc1 $3, $f4           # encoding: [0x54,0x64,0x28,0x3b]
+  mtc2 $5, $6              # CHECK: mtc2 $5, $6            # encoding: [0x00,0xa6,0x5d,0x3c]
+  mthc0 $7, $8             # CHECK: mthc0 $7, $8, 0        # encoding: [0x00,0xe8,0x02,0xf4]
+  mthc0 $9, $10, 1         # CHECK: mthc0 $9, $10, 1       # encoding: [0x01,0x2a,0x0a,0xf4]
+  mthc1 $11, $f12          # CHECK: mthc1 $11, $f12        # encoding: [0x55,0x6c,0x38,0x3b]
+  mthc2 $13, $14           # CHECK: mthc2 $13, $14         # encoding: [0x01,0xae,0x9d,0x3c]
+  mfc0 $3, $7              # CHECK: mfc0 $3, $7, 0         # encoding: [0x00,0x67,0x00,0xfc]
+  mfc0 $3, $7, 3           # CHECK: mfc0 $3, $7, 3         # encoding: [0x00,0x67,0x18,0xfc]
+  mfc1 $5, $f10            # CHECK: mfc1 $5, $f10          # encoding: [0x54,0xaa,0x20,0x3b]
+  mfc2 $15, $5             # CHECK: mfc2 $15, $5           # encoding: [0x01,0xe5,0x4d,0x3c]
+  mfhc0 $20, $21           # CHECK: mfhc0 $20, $21, 0      # encoding: [0x02,0x95,0x00,0xf4]
+  mfhc0 $1, $2, 1          # CHECK: mfhc0 $1, $2, 1        # encoding: [0x00,0x22,0x08,0xf4]
+  mfhc1 $zero, $f6         # CHECK: mfhc1 $zero, $f6       # encoding: [0x54,0x06,0x30,0x3b]
+  mfhc2 $23, $16           # CHECK: mfhc2 $23, $16         # encoding: [0x02,0xf0,0x8d,0x3c]
diff --git a/llvm/test/MC/Mips/micromips64r6/invalid.s b/llvm/test/MC/Mips/micromips64r6/invalid.s
index 1c92a88e6ef..09428bd4a71 100644
--- a/llvm/test/MC/Mips/micromips64r6/invalid.s
+++ b/llvm/test/MC/Mips/micromips64r6/invalid.s
@@ -138,9 +138,11 @@
   swm16 $16-$20, 8($sp)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   swm16 $16, $17, $ra, 8($fp)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   swm16 $16, $17, $ra, 64($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  mtc0  $4, $3, -1         # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  mtc0  $4, $3, 8          # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  mthc0 $4, $3, -1         # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  mthc0 $4, $3, 8          # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  dmtc0  $4, $3, -1        # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
-  dmtc0  $4, $3, 8         # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
+  mtc0  $4, $3, -1             # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mtc0  $4, $3, 8              # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mthc0 $4, $3, -1             # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  mthc0 $4, $3, 8              # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
+  dmtc0  $4, $3, -1            # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
+  dmtc0  $4, $3, 8             # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
+  dmfc0  $4, $3, -1            # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
+  dmfc0  $4, $3, 8             # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
diff --git a/llvm/test/MC/Mips/micromips64r6/valid.s b/llvm/test/MC/Mips/micromips64r6/valid.s
index 48d2a21b3f6..3412740fbea 100644
--- a/llvm/test/MC/Mips/micromips64r6/valid.s
+++ b/llvm/test/MC/Mips/micromips64r6/valid.s
@@ -171,5 +171,9 @@ a:
         dmtc0 $17, $18, 5        # CHECK: dmtc0 $17, $18, 5       # encoding: [0x5a,0x32,0x2a,0xfc]
         dmtc1 $19, $f20          # CHECK: dmtc1 $19, $f20         # encoding: [0x56,0x74,0x2c,0x3b]
         dmtc2 $21, $22           # CHECK: dmtc2 $21, $22          # encoding: [0x02,0xb6,0x7d,0x3c]
+        dmfc0 $18, $17           # CHECK: dmfc0 $18, $17, 0       # encoding: [0x5a,0x51,0x00,0xfc]
+        dmfc0 $9, $1, 1          # CHECK: dmfc0 $9, $1, 1         # encoding: [0x59,0x21,0x08,0xfc]
+        dmfc1 $9, $f4            # CHECK: dmfc1 $9, $f4           # encoding: [0x55,0x24,0x24,0x3b]
+        dmfc2 $14, $18           # CHECK: dmfc2 $14, $18          # encoding: [0x01,0xd2,0x6d,0x3c]
 
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