GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR.

These are the operations that are trivially identical. Division is omitted for
now because you need to use the correct sign/zero extension.

llvm-svn: 277775

5 files changed, 160 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
new file mode 100644
index 00000000000..2896401a949
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
@@ -0,0 +1,32 @@
+# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64-apple-ios"
+  define void @test_scalar_and_small() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_scalar_and_small
+isSSA:           true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_scalar_and_small
+    ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXTEND s32 %0
+    ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXTEND s32 %1
+    ; CHECK: [[RES:%.*]](32) = G_AND s32 [[LHS]], [[RHS]]
+    ; CHECK: %2(8) = G_TRUNC s8 [[RES]]
+
+    %0(8) = G_TRUNC s8 %x0
+    %1(8) = G_TRUNC s8 %x1
+    %2(8) = G_AND s8 %0, %1
+    %x0 = G_ANYEXTEND s64 %2
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
new file mode 100644
index 00000000000..d559353ce61
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
@@ -0,0 +1,32 @@
+# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64-apple-ios"
+  define void @test_scalar_mul_small() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_scalar_mul_small
+isSSA:           true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_scalar_mul_small
+    ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXTEND s32 %0
+    ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXTEND s32 %1
+    ; CHECK: [[RES:%.*]](32) = G_MUL s32 [[LHS]], [[RHS]]
+    ; CHECK: %2(8) = G_TRUNC s8 [[RES]]
+
+    %0(8) = G_TRUNC s8 %x0
+    %1(8) = G_TRUNC s8 %x1
+    %2(8) = G_MUL s8 %0, %1
+    %x0 = G_ANYEXTEND s64 %2
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
new file mode 100644
index 00000000000..e777d449f20
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
@@ -0,0 +1,32 @@
+# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64-apple-ios"
+  define void @test_scalar_or_small() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_scalar_or_small
+isSSA:           true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_scalar_or_small
+    ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXTEND s32 %0
+    ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXTEND s32 %1
+    ; CHECK: [[RES:%.*]](32) = G_OR s32 [[LHS]], [[RHS]]
+    ; CHECK: %2(8) = G_TRUNC s8 [[RES]]
+
+    %0(8) = G_TRUNC s8 %x0
+    %1(8) = G_TRUNC s8 %x1
+    %2(8) = G_OR s8 %0, %1
+    %x0 = G_ANYEXTEND s64 %2
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
new file mode 100644
index 00000000000..b99b9f024fb
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
@@ -0,0 +1,32 @@
+# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64-apple-ios"
+  define void @test_scalar_sub_small() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_scalar_sub_small
+isSSA:           true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_scalar_sub_small
+    ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXTEND s32 %0
+    ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXTEND s32 %1
+    ; CHECK: [[RES:%.*]](32) = G_SUB s32 [[LHS]], [[RHS]]
+    ; CHECK: %2(8) = G_TRUNC s8 [[RES]]
+
+    %0(8) = G_TRUNC s8 %x0
+    %1(8) = G_TRUNC s8 %x1
+    %2(8) = G_SUB s8 %0, %1
+    %x0 = G_ANYEXTEND s64 %2
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
new file mode 100644
index 00000000000..8c9c31a8764
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
@@ -0,0 +1,32 @@
+# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64-apple-ios"
+  define void @test_scalar_xor_small() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_scalar_xor_small
+isSSA:           true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %x0, %x1, %x2, %x3
+    ; CHECK-LABEL: name: test_scalar_xor_small
+    ; CHECK-DAG: [[LHS:%.*]](32) = G_ANYEXTEND s32 %0
+    ; CHECK-DAG: [[RHS:%.*]](32) = G_ANYEXTEND s32 %1
+    ; CHECK: [[RES:%.*]](32) = G_XOR s32 [[LHS]], [[RHS]]
+    ; CHECK: %2(8) = G_TRUNC s8 [[RES]]
+
+    %0(8) = G_TRUNC s8 %x0
+    %1(8) = G_TRUNC s8 %x1
+    %2(8) = G_XOR s8 %0, %1
+    %x0 = G_ANYEXTEND s64 %2
+...