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| author | Valery Pykhtin <Valery.Pykhtin@amd.com> | 2016-08-18 18:06:20 +0000 |
|---|---|---|
| committer | Valery Pykhtin <Valery.Pykhtin@amd.com> | 2016-08-18 18:06:20 +0000 |
| commit | 609c2f8137eafc0fcef14a9c961672910ae0bf00 (patch) | |
| tree | 6a17a592ca1542a4f21e6137879cad6c7b6fd0aa /llvm/test | |
| parent | 687691aeac1065d2a023aafe0354507f90d7c080 (diff) | |
| download | bcm5719-llvm-609c2f8137eafc0fcef14a9c961672910ae0bf00.tar.gz bcm5719-llvm-609c2f8137eafc0fcef14a9c961672910ae0bf00.zip | |
[AMDGPU] add s_incperflevel/s_decperflevel intrinsics.
Differential revision: https://reviews.llvm.org/D23666
llvm-svn: 279106
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll | 43 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll | 43 |
2 files changed, 86 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll new file mode 100644 index 00000000000..72513fc86f4 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll @@ -0,0 +1,43 @@ +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s + +declare void @llvm.amdgcn.s.decperflevel(i32) #0 + +; GCN-LABEL: {{^}}test_s_decperflevel: +; GCN: s_decperflevel 0{{$}} +; GCN: s_decperflevel 1{{$}} +; GCN: s_decperflevel 2{{$}} +; GCN: s_decperflevel 3{{$}} +; GCN: s_decperflevel 4{{$}} +; GCN: s_decperflevel 5{{$}} +; GCN: s_decperflevel 6{{$}} +; GCN: s_decperflevel 7{{$}} +; GCN: s_decperflevel 8{{$}} +; GCN: s_decperflevel 9{{$}} +; GCN: s_decperflevel 10{{$}} +; GCN: s_decperflevel 11{{$}} +; GCN: s_decperflevel 12{{$}} +; GCN: s_decperflevel 13{{$}} +; GCN: s_decperflevel 14{{$}} +; GCN: s_decperflevel 15{{$}} +define void @test_s_decperflevel(i32 %x) #0 { + call void @llvm.amdgcn.s.decperflevel(i32 0) + call void @llvm.amdgcn.s.decperflevel(i32 1) + call void @llvm.amdgcn.s.decperflevel(i32 2) + call void @llvm.amdgcn.s.decperflevel(i32 3) + call void @llvm.amdgcn.s.decperflevel(i32 4) + call void @llvm.amdgcn.s.decperflevel(i32 5) + call void @llvm.amdgcn.s.decperflevel(i32 6) + call void @llvm.amdgcn.s.decperflevel(i32 7) + call void @llvm.amdgcn.s.decperflevel(i32 8) + call void @llvm.amdgcn.s.decperflevel(i32 9) + call void @llvm.amdgcn.s.decperflevel(i32 10) + call void @llvm.amdgcn.s.decperflevel(i32 11) + call void @llvm.amdgcn.s.decperflevel(i32 12) + call void @llvm.amdgcn.s.decperflevel(i32 13) + call void @llvm.amdgcn.s.decperflevel(i32 14) + call void @llvm.amdgcn.s.decperflevel(i32 15) + ret void +} + +attributes #0 = { nounwind } diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll new file mode 100644 index 00000000000..2ae4fc473ea --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll @@ -0,0 +1,43 @@ +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s + +declare void @llvm.amdgcn.s.incperflevel(i32) #0 + +; GCN-LABEL: {{^}}test_s_incperflevel: +; GCN: s_incperflevel 0{{$}} +; GCN: s_incperflevel 1{{$}} +; GCN: s_incperflevel 2{{$}} +; GCN: s_incperflevel 3{{$}} +; GCN: s_incperflevel 4{{$}} +; GCN: s_incperflevel 5{{$}} +; GCN: s_incperflevel 6{{$}} +; GCN: s_incperflevel 7{{$}} +; GCN: s_incperflevel 8{{$}} +; GCN: s_incperflevel 9{{$}} +; GCN: s_incperflevel 10{{$}} +; GCN: s_incperflevel 11{{$}} +; GCN: s_incperflevel 12{{$}} +; GCN: s_incperflevel 13{{$}} +; GCN: s_incperflevel 14{{$}} +; GCN: s_incperflevel 15{{$}} +define void @test_s_incperflevel(i32 %x) #0 { + call void @llvm.amdgcn.s.incperflevel(i32 0) + call void @llvm.amdgcn.s.incperflevel(i32 1) + call void @llvm.amdgcn.s.incperflevel(i32 2) + call void @llvm.amdgcn.s.incperflevel(i32 3) + call void @llvm.amdgcn.s.incperflevel(i32 4) + call void @llvm.amdgcn.s.incperflevel(i32 5) + call void @llvm.amdgcn.s.incperflevel(i32 6) + call void @llvm.amdgcn.s.incperflevel(i32 7) + call void @llvm.amdgcn.s.incperflevel(i32 8) + call void @llvm.amdgcn.s.incperflevel(i32 9) + call void @llvm.amdgcn.s.incperflevel(i32 10) + call void @llvm.amdgcn.s.incperflevel(i32 11) + call void @llvm.amdgcn.s.incperflevel(i32 12) + call void @llvm.amdgcn.s.incperflevel(i32 13) + call void @llvm.amdgcn.s.incperflevel(i32 14) + call void @llvm.amdgcn.s.incperflevel(i32 15) + ret void +} + +attributes #0 = { nounwind } |
