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authorAkira Hatanaka <ahatanaka@mips.com>2012-09-27 01:50:59 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-09-27 01:50:59 +0000
commit5eeac4f813f57f56097799b532e2abe28f0a1616 (patch)
tree598def04666626b9d77fd1f2a88f47b8bd241293 /llvm/test
parent4fcd2885deb078fa46b39666a2fe8c8d3cdfaa68 (diff)
downloadbcm5719-llvm-5eeac4f813f57f56097799b532e2abe28f0a1616.tar.gz
bcm5719-llvm-5eeac4f813f57f56097799b532e2abe28f0a1616.zip
MIPS DSP: add vector load/store patterns.
llvm-svn: 164744
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/Mips/vector-load-store.ll27
1 files changed, 27 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/vector-load-store.ll b/llvm/test/CodeGen/Mips/vector-load-store.ll
new file mode 100644
index 00000000000..d8899630990
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/vector-load-store.ll
@@ -0,0 +1,27 @@
+; RUN: llc -march=mipsel -mattr=+dsp < %s | FileCheck %s
+
+@g1 = common global <2 x i16> zeroinitializer, align 4
+@g0 = common global <2 x i16> zeroinitializer, align 4
+@g3 = common global <4 x i8> zeroinitializer, align 4
+@g2 = common global <4 x i8> zeroinitializer, align 4
+
+define void @func_v2i16() nounwind {
+entry:
+; CHECK: lw
+; CHECK: sw
+
+ %0 = load <2 x i16>* @g1, align 4
+ store <2 x i16> %0, <2 x i16>* @g0, align 4
+ ret void
+}
+
+define void @func_v4i8() nounwind {
+entry:
+; CHECK: lw
+; CHECK: sw
+
+ %0 = load <4 x i8>* @g3, align 4
+ store <4 x i8> %0, <4 x i8>* @g2, align 4
+ ret void
+}
+
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