[Hexagon] Expand handling of the small-data/bss section

llvm-svn: 267034

5 files changed, 88 insertions, 5 deletions

diff --git a/llvm/test/CodeGen/Hexagon/extload-combine.ll b/llvm/test/CodeGen/Hexagon/extload-combine.ll
index 773b10b2b28..c492343d791 100644
--- a/llvm/test/CodeGen/Hexagon/extload-combine.ll
+++ b/llvm/test/CodeGen/Hexagon/extload-combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=hexagon -mcpu=hexagonv4 -O3 -disable-hsdr  < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-small-data-threshold=0 -disable-hsdr  < %s | FileCheck %s
 ; Check that the combine/stxw instructions are being generated.
 ; In case of combine one of the operand should be 0 and another should be
 ; the output of absolute addressing load instruction.
diff --git a/llvm/test/CodeGen/Hexagon/sdata-array.ll b/llvm/test/CodeGen/Hexagon/sdata-array.ll
new file mode 100644
index 00000000000..89ef46079f7
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/sdata-array.ll
@@ -0,0 +1,13 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; No arrays in sdata.
+; CHECK: memb(##foo)
+
+@foo = common global [4 x i8] zeroinitializer, align 1
+
+define void @set() nounwind {
+entry:
+  store i8 0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @foo, i32 0, i32 0), align 1
+  ret void
+}
+
diff --git a/llvm/test/CodeGen/Hexagon/sdata-basic.ll b/llvm/test/CodeGen/Hexagon/sdata-basic.ll
new file mode 100644
index 00000000000..db7375417df
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/sdata-basic.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon -O2 < %s | FileCheck %s
+; CHECK-NOT: ##var
+target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
+target triple = "hexagon"
+
+@var = external global i32
+
+define i32 @foo() nounwind readonly {
+entry:
+  %0 = load i32, i32* @var, align 4, !tbaa !0
+  ret i32 %0
+}
+
+!0 = !{!"int", !1}
+!1 = !{!"omnipotent char", !2}
+!2 = !{!"Simple C/C++ TBAA"}
diff --git a/llvm/test/CodeGen/Hexagon/section_7275.ll b/llvm/test/CodeGen/Hexagon/section_7275.ll
new file mode 100644
index 00000000000..c2b80ae3f69
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/section_7275.ll
@@ -0,0 +1,54 @@
+; The reason for the bug was that when deciding if a global
+; variable can be part of sdata, we were wrongly ignoring
+; the presence of any section specified for the variable
+; using the section attribute. If such a section is specified,
+; and that section is not sdata*/sbss* then the variable
+; cannot use GPREL addressing, i.e. memw(#variablename).
+
+; RUN: llc -march=hexagon < %s | FileCheck %s
+; CHECK-LABEL: foo
+; CHECK-DAG: memw(##b)
+; CHECK-DAG: memw(#d)
+; CHECK-DAG: memw(##g)
+; CHECK-DAG: memw(#h)
+; CHECK-DAG: memw(#f)
+; CHECK-DAG: memw(##e)
+; CHECK-DAG: memw(#a)
+; CHECK-DAG: memw(#c)
+; CHECK-LABEL: bar
+; CHECK: memw(##b)
+
+@b = global i32 0, section ".data.section", align 4
+@a = common global i32 0, align 4
+@d = global i32 0, section ".sbss", align 4
+@c = global i32 0, section ".sdata", align 4
+@f = global i32 0, section ".sbss.4", align 4
+@e = global i32 0, section ".sdatafoo", align 4
+@h = global i32 0, section ".sdata.4", align 4
+@g = global i32 0, section ".sbssfoo", align 4
+
+define void @foo() nounwind {
+entry:
+  %0 = load i32, i32* @b, align 4
+  store i32 %0, i32* @a, align 4
+  %1 = load i32, i32* @d, align 4
+  store i32 %1, i32* @c, align 4
+  %2 = load i32, i32* @f, align 4
+  store i32 %2, i32* @e, align 4
+  %3 = load i32, i32* @h, align 4
+  store i32 %3, i32* @g, align 4
+  ret void
+}
+
+define void @bar() nounwind section ".function.section" {
+entry:
+  %0 = load i32, i32* @a, align 4
+  store i32 %0, i32* @b, align 4
+  ret void
+}
+
+define i32 @main() nounwind readnone {
+entry:
+  ret i32 0
+}
+
diff --git a/llvm/test/CodeGen/Hexagon/static.ll b/llvm/test/CodeGen/Hexagon/static.ll
index 760b8b55972..c3237b74888 100644
--- a/llvm/test/CodeGen/Hexagon/static.ll
+++ b/llvm/test/CodeGen/Hexagon/static.ll
@@ -1,12 +1,12 @@
-; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched -disable-hexagon-misched < %s | FileCheck %s
+; RUN: llc -march=hexagon < %s | FileCheck %s
 
 @num = external global i32
 @acc = external global i32
 @val = external global i32
 
-; CHECK: memw(##num)
-; CHECK: memw(##acc)
-; CHECK: memw(##val)
+; CHECK-DAG: memw(#num)
+; CHECK-DAG: memw(#acc)
+; CHECK-DAG: memw(#val)
 
 define void @foo() nounwind {
 entry: