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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-02-21 17:04:11 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-02-21 17:04:11 +0000 |
| commit | 5afda309303a7902ee44c5799cd0ef0dfaa48a2a (patch) | |
| tree | a82a155e2b69934c8417280352e12e2336a50f73 /llvm/test | |
| parent | f321ab6dd2efb0d511f5f560fc862d507f2a08c7 (diff) | |
| download | bcm5719-llvm-5afda309303a7902ee44c5799cd0ef0dfaa48a2a.tar.gz bcm5719-llvm-5afda309303a7902ee44c5799cd0ef0dfaa48a2a.zip | |
[X86][AVX512] Update VPBROADCASTQ test to combine from VPERMQ instead of VPERMI2Q.
VPERMI2Q doesn't have shuffle decoding from re-materializable constants.
llvm-svn: 295736
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll index 58451d3760e..a6ed809903b 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll @@ -1136,18 +1136,17 @@ define <16 x float> @combine_vpermi2var_vpermvar_16f32_as_vperm2_zero(<16 x floa define <8 x i64> @combine_vpermvar_insertion_as_broadcast_v8i64(i64 %a0) { ; X32-LABEL: combine_vpermvar_insertion_as_broadcast_v8i64: ; X32: # BB#0: -; X32-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X32-NEXT: vpxord %zmm0, %zmm0, %zmm0 -; X32-NEXT: vpermi2q %zmm0, %zmm1, %zmm0 +; X32-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: vpxord %zmm1, %zmm1, %zmm1 +; X32-NEXT: vpermq %zmm0, %zmm1, %zmm0 ; X32-NEXT: retl ; ; X64-LABEL: combine_vpermvar_insertion_as_broadcast_v8i64: ; X64: # BB#0: -; X64-NEXT: vmovq %rdi, %xmm1 -; X64-NEXT: vpxord %zmm0, %zmm0, %zmm0 -; X64-NEXT: vpermi2q %zmm0, %zmm1, %zmm0 +; X64-NEXT: vmovq %rdi, %xmm0 +; X64-NEXT: vpbroadcastq %xmm0, %zmm0 ; X64-NEXT: retq %1 = insertelement <8 x i64> undef, i64 %a0, i32 0 - %2 = tail call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %1, <8 x i64> zeroinitializer, <8 x i64> undef, i8 -1) + %2 = tail call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %1, <8 x i64> zeroinitializer, <8 x i64> undef, i8 -1) ret <8 x i64> %2 } |
