[X86][AVX-512] Don't raise inexact in ceil, floor, round, trunc.

The non-AVX-512 behavior was changed in r248266 to match N1778
(C bindings for IEEE-754 (2008)), which defined the four functions
to not raise the inexact exception ("rint" is still defined as raising
it).

Update the AVX-512 lowering of these functions to match that: it should
not be different.

llvm-svn: 306299

1 files changed, 8 insertions, 8 deletions

diff --git a/llvm/test/CodeGen/X86/avx512-round.ll b/llvm/test/CodeGen/X86/avx512-round.ll
index c4f417e75ab..b23af2b09a7 100644
--- a/llvm/test/CodeGen/X86/avx512-round.ll
+++ b/llvm/test/CodeGen/X86/avx512-round.ll
@@ -2,7 +2,7 @@
 
 define <16 x float> @floor_v16f32(<16 x float> %a) {
 ; CHECK-LABEL: floor_v16f32
-; CHECK: vrndscaleps $1, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x01]
+; CHECK: vrndscaleps $9, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x09]
   %res = call <16 x float> @llvm.floor.v16f32(<16 x float> %a)
   ret <16 x float> %res
 }
@@ -10,7 +10,7 @@ declare <16 x float> @llvm.floor.v16f32(<16 x float> %p)
 
 define <8 x double> @floor_v8f64(<8 x double> %a) {
 ; CHECK-LABEL: floor_v8f64
-; CHECK: vrndscalepd $1, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x01]
+; CHECK: vrndscalepd $9, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x09]
   %res = call <8 x double> @llvm.floor.v8f64(<8 x double> %a)
   ret <8 x double> %res
 }
@@ -18,7 +18,7 @@ declare <8 x double> @llvm.floor.v8f64(<8 x double> %p)
 
 define <16 x float> @ceil_v16f32(<16 x float> %a) {
 ; CHECK-LABEL: ceil_v16f32
-; CHECK: vrndscaleps $2, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x02]
+; CHECK: vrndscaleps $10, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0a]
   %res = call <16 x float> @llvm.ceil.v16f32(<16 x float> %a)
   ret <16 x float> %res
 }
@@ -26,7 +26,7 @@ declare <16 x float> @llvm.ceil.v16f32(<16 x float> %p)
 
 define <8 x double> @ceil_v8f64(<8 x double> %a) {
 ; CHECK-LABEL: ceil_v8f64
-; CHECK: vrndscalepd $2, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x02]
+; CHECK: vrndscalepd $10, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0a]
   %res = call <8 x double> @llvm.ceil.v8f64(<8 x double> %a)
   ret <8 x double> %res
 }
@@ -34,7 +34,7 @@ declare <8 x double> @llvm.ceil.v8f64(<8 x double> %p)
 
 define <16 x float> @trunc_v16f32(<16 x float> %a) {
 ; CHECK-LABEL: trunc_v16f32
-; CHECK: vrndscaleps $3, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x03]
+; CHECK: vrndscaleps $11, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0b]
   %res = call <16 x float> @llvm.trunc.v16f32(<16 x float> %a)
   ret <16 x float> %res
 }
@@ -42,7 +42,7 @@ declare <16 x float> @llvm.trunc.v16f32(<16 x float> %p)
 
 define <8 x double> @trunc_v8f64(<8 x double> %a) {
 ; CHECK-LABEL: trunc_v8f64
-; CHECK: vrndscalepd $3, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x03]
+; CHECK: vrndscalepd $11, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0b]
   %res = call <8 x double> @llvm.trunc.v8f64(<8 x double> %a)
   ret <8 x double> %res
 }
@@ -90,7 +90,7 @@ declare double @llvm.nearbyint.f64(double %p)
 
 define float @floor_f32(float %a) {
 ; CHECK-LABEL: floor_f32
-; CHECK: vrndscaless $1, {{.*}}encoding: [0x62,0xf3,0x7d,0x08,0x0a,0xc0,0x01]
+; CHECK: vrndscaless $9, {{.*}}encoding: [0x62,0xf3,0x7d,0x08,0x0a,0xc0,0x09]
   %res = call float @llvm.floor.f32(float %a)
   ret float %res
 }
@@ -98,7 +98,7 @@ declare float @llvm.floor.f32(float %p)
 
 define float @floor_f32m(float* %aptr) {
 ; CHECK-LABEL: floor_f32m
-; CHECK: vrndscaless $1, (%rdi), {{.*}}encoding: [0x62,0xf3,0x7d,0x08,0x0a,0x07,0x01]
+; CHECK: vrndscaless $9, (%rdi), {{.*}}encoding: [0x62,0xf3,0x7d,0x08,0x0a,0x07,0x09]
   %a = load float, float* %aptr, align 4
   %res = call float @llvm.floor.f32(float %a)
   ret float %res