[mips] Implement the 'dext' aliases and it's disassembly alias.

The other members of the dext family of instructions (dextm, dextu) are
traditionally handled by the assembler selecting the right variant of
'dext' depending on the values of the position and size operands.

When these instructions are disassembled, rather than reporting the
actual instruction, an equivalent aliased form of 'dext' is generated
and is reported. This is to mimic the behaviour of binutils.

Reviewers: slthakur, nitesh.jain, atanasyan

Differential Revision: https://reviews.llvm.org/D34887

llvm-svn: 313276

5 files changed, 20 insertions, 9 deletions

diff --git a/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
index 66827e6d920..9186e66d4d0 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
@@ -38,8 +38,8 @@
 0x42 0x23 0x00 0x04 # CHECK: dahi $3, $3, 4
 0x42 0x03 0x00 0x04 # CHECK: dati $3, $3, 4
 0x59 0x26 0x30 0xec # CHECK: dext $9, $6, 3, 7
-0x59 0x26 0x30 0xe4 # CHECK: dextm $9, $6, 3, 39
-0x59 0x26 0x30 0xd4 # CHECK: dextu $9, $6, 35, 7
+0x59 0x26 0x30 0xe4 # CHECK: dext $9, $6, 3, 39
+0x59 0x26 0x30 0xd4 # CHECK: dext $9, $6, 35, 7
 0x58 0x43 0x25 0x1c # CHECK: dalign $4, $2, $3, 5
 0x58 0xa4 0x19 0x18 # CHECK: ddiv $3, $4, $5
 0x58 0xa4 0x19 0x58 # CHECK: dmod $3, $4, $5
diff --git a/llvm/test/MC/Mips/micromips64r6/invalid.s b/llvm/test/MC/Mips/micromips64r6/invalid.s
index ffe50e75bf4..2a864d35102 100644
--- a/llvm/test/MC/Mips/micromips64r6/invalid.s
+++ b/llvm/test/MC/Mips/micromips64r6/invalid.s
@@ -30,11 +30,9 @@
   daui    $4, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
   dati    $4, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
   dati    $4, $5, 1        # CHECK: :[[@LINE]]:3: error: source and destination must match
-  # FIXME: Check various 'pos + size' constraints on dext*
   dext $2, $3, -1, 1   # CHECK: :[[@LINE]]:16: error: expected 6-bit unsigned immediate
   dext $2, $3, 64, 1   # CHECK: :[[@LINE]]:16: error: expected 6-bit unsigned immediate
   dext $2, $3, 1, 0    # CHECK: :[[@LINE]]:19: error: expected immediate in range 1 .. 32
-  dext $2, $3, 1, 33   # CHECK: :[[@LINE]]:19: error: expected immediate in range 1 .. 32
   dextm $2, $3, -1, 1  # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
   dextm $2, $3, 32, 1  # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
   dextm $2, $3, -1, 33 # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
diff --git a/llvm/test/MC/Mips/mips64extins.s b/llvm/test/MC/Mips/mips64extins.s
index ec8281b1ebf..f210cf44f0d 100644
--- a/llvm/test/MC/Mips/mips64extins.s
+++ b/llvm/test/MC/Mips/mips64extins.s
@@ -10,8 +10,8 @@
 # RUN:     %s -o - | FileCheck --check-prefix=ASM %s
 
         dext $2, $4, 5, 10   # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
-        dextu $2, $4, 34, 6  # OBJ: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
-        dextm $2, $4, 5, 34  # OBJ: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
+        dextu $2, $4, 34, 6  # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
+        dextm $2, $4, 5, 34  # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
         dins $4, $5, 8, 10   # OBJ: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
         dinsm $4, $5, 30, 6  # OBJ: dins ${{[0-9]+}}, ${{[0-9]+}}, 30, 6
         dinsu $4, $5, 40, 13 # OBJ: dins ${{[0-9]+}}, ${{[0-9]+}}, 40, 13
@@ -19,7 +19,14 @@
         dins $2, $4, 5, 10   # OBJ: dins ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
         dins $2, $4, 34, 6   # OBJ: dins ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
         dins $2, $4, 5, 34   # OBJ: dins ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
+        dext $2, $4, 5, 10   # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
+        dext $2, $4, 34, 6   # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
+        dext $2, $4, 5, 34   # OBJ: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
         # check the edge values
-        dins $3, $4, 31, 1  # ASM: dins $3, $4, 31, 1
+        dins $3, $4, 31, 1   # ASM: dins $3, $4, 31, 1
         dins $3, $4, 31, 33  # ASM: dinsm $3, $4, 31, 33
         dins $3, $4, 32, 32  # ASM: dinsu $3, $4, 32, 32
+        dext $3, $4, 31, 32  # ASM: dext $3, $4, 31, 32
+        dext $3, $4, 31, 33  # ASM: dextm $3, $4, 31, 33
+        dext $3, $4, 32, 32  # ASM: dextu $3, $4, 32, 32
+
diff --git a/llvm/test/MC/Mips/mips64r2/invalid.s b/llvm/test/MC/Mips/mips64r2/invalid.s
index 84438c61528..9ebb5fc799b 100644
--- a/llvm/test/MC/Mips/mips64r2/invalid.s
+++ b/llvm/test/MC/Mips/mips64r2/invalid.s
@@ -10,28 +10,30 @@
         andi $2, $3, 65536   # CHECK: :[[@LINE]]:22: error: expected 16-bit unsigned immediate
         cache -1, 255($7)    # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
         cache 32, 255($7)    # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-        # FIXME: Check various 'pos + size' constraints on dext*
         dext $2, $3, -1, 1   # CHECK: :[[@LINE]]:22: error: expected 6-bit unsigned immediate
         dext $2, $3, 64, 1   # CHECK: :[[@LINE]]:22: error: expected 6-bit unsigned immediate
         dext $2, $3, 1, 0    # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 32
-        dext $2, $3, 1, 33   # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 32
         dextm $2, $3, -1, 1  # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
         dextm $2, $3, 32, 1  # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
         dextm $2, $3, -1, 33 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
         dextm $2, $3, 32, 33 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
         dextm $2, $3, 1, 32  # CHECK: :[[@LINE]]:26: error: expected immediate in range 33 .. 64
         dextm $2, $3, 1, 65  # CHECK: :[[@LINE]]:26: error: expected immediate in range 33 .. 64
+        dextm $3, $4, 31, 34 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
         dextu $2, $3, 31, 1  # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
         dextu $2, $3, 64, 1  # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
         dextu $2, $3, 32, 0  # CHECK: :[[@LINE]]:27: error: expected immediate in range 1 .. 32
         dextu $2, $3, 32, 33 # CHECK: :[[@LINE]]:27: error: expected immediate in range 1 .. 32
+        dextu $3, $4, 33, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
         # FIXME: Check size on dins*
         dins $2, $3, -1, 1   # CHECK: :[[@LINE]]:22: error: expected 6-bit unsigned immediate
         dins $2, $3, 64, 1   # CHECK: :[[@LINE]]:22: error: expected 6-bit unsigned immediate
         dinsm $2, $3, -1, 1  # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
         dinsm $2, $3, 32, 1  # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
+        dinsm $4, $5, 31, 34 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
         dinsu $2, $3, 31, 1  # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
         dinsu $2, $3, 64, 1  # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
+        dinsu $4, $5, 33, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
         drotr $2, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 6-bit unsigned immediate
         drotr $2, $3, 64     # CHECK: :[[@LINE]]:23: error: expected 6-bit unsigned immediate
         drotr32 $2, $3, -1   # CHECK: :[[@LINE]]:25: error: expected 5-bit unsigned immediate
diff --git a/llvm/test/MC/Mips/mips64r6/invalid.s b/llvm/test/MC/Mips/mips64r6/invalid.s
index 076e2fd7d2b..82f3a2b69f5 100644
--- a/llvm/test/MC/Mips/mips64r6/invalid.s
+++ b/llvm/test/MC/Mips/mips64r6/invalid.s
@@ -23,6 +23,10 @@ local_label:
         break 7, 1024     # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
         break 1024, 1024  # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
         dati $2, $3, 1    # CHECK: :[[@LINE]]:9: error: source and destination must match
+        dextm $3, $4, 31, 34 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
+        dextu $3, $4, 33, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
+        dinsm $4, $5, 31, 34 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
+        dinsu $4, $5, 33, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
         lh  $33, 8($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhe $34, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhu $35, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction