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authorSanjay Patel <spatel@rotateright.com>2015-08-11 14:29:45 +0000
committerSanjay Patel <spatel@rotateright.com>2015-08-11 14:29:45 +0000
commit52c2691829200710139decef3d0f5627423554bb (patch)
tree610de11b30181336f0098fefd4cf0253301fbe6a /llvm/test
parente8c8d887befd1c1a169da6e3711ac1b3419a5b04 (diff)
downloadbcm5719-llvm-52c2691829200710139decef3d0f5627423554bb.tar.gz
bcm5719-llvm-52c2691829200710139decef3d0f5627423554bb.zip
add missing test for machine combiner when optimizing for size
The minsize test will be fixed in the next commit. llvm-svn: 244603
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/AArch64/mul-lohi.ll30
1 files changed, 30 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/mul-lohi.ll b/llvm/test/CodeGen/AArch64/mul-lohi.ll
index 4515697b999..647594f41de 100644
--- a/llvm/test/CodeGen/AArch64/mul-lohi.ll
+++ b/llvm/test/CodeGen/AArch64/mul-lohi.ll
@@ -1,5 +1,6 @@
; RUN: llc -mtriple=arm64-apple-ios7.0 -mcpu=cyclone %s -o - | FileCheck %s
; RUN: llc -mtriple=aarch64_be-linux-gnu -mcpu=cyclone %s -o - | FileCheck --check-prefix=CHECK-BE %s
+
define i128 @test_128bitmul(i128 %lhs, i128 %rhs) {
; CHECK-LABEL: test_128bitmul:
; CHECK-DAG: mul [[PART1:x[0-9]+]], x0, x3
@@ -16,3 +17,32 @@ define i128 @test_128bitmul(i128 %lhs, i128 %rhs) {
%prod = mul i128 %lhs, %rhs
ret i128 %prod
}
+
+; The machine combiner should create madd instructions when
+; optimizing for size because that's smaller than mul + add.
+
+define i128 @test_128bitmul_optsize(i128 %lhs, i128 %rhs) optsize {
+; CHECK-LABEL: test_128bitmul_optsize:
+; CHECK: umulh [[HI:x[0-9]+]], x0, x2
+; CHECK-NEXT: madd [[TEMP1:x[0-9]+]], x0, x3, [[HI]]
+; CHECK-NEXT: madd x1, x1, x2, [[TEMP1]]
+; CHECK-NEXT: mul x0, x0, x2
+; CHECK-NEXT: ret
+
+ %prod = mul i128 %lhs, %rhs
+ ret i128 %prod
+}
+
+; FIXME: This should be the same as the optsize test above.
+
+define i128 @test_128bitmul_minsize(i128 %lhs, i128 %rhs) minsize {
+; CHECK-LABEL: test_128bitmul_minsize:
+; CHECK-DAG: mul [[PART1:x[0-9]+]], x0, x3
+; CHECK-DAG: umulh [[CARRY:x[0-9]+]], x0, x2
+; CHECK: mul [[PART2:x[0-9]+]], x1, x2
+; CHECK: mul x0, x0, x2
+
+ %prod = mul i128 %lhs, %rhs
+ ret i128 %prod
+}
+
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