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| author | Sanjay Patel <spatel@rotateright.com> | 2018-12-22 16:59:02 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-12-22 16:59:02 +0000 |
| commit | 52c02d70e276aa1e138b9f43988de60838aacb8c (patch) | |
| tree | 5f3ffd03e51948e70083a8d1fbcb7235e275691a /llvm/test | |
| parent | c682c197741484e9bc07611e460f6feb4f40edf9 (diff) | |
| download | bcm5719-llvm-52c02d70e276aa1e138b9f43988de60838aacb8c.tar.gz bcm5719-llvm-52c02d70e276aa1e138b9f43988de60838aacb8c.zip | |
[x86] add load fold patterns for movddup with vzext_load
The missed load folding noticed in D55898 is visible independent of that change
either with an adjusted IR pattern to start or with AVX2/AVX512 (where the build
vector becomes a broadcast first; movddup is not produced until we get into isel
via tablegen patterns).
Differential Revision: https://reviews.llvm.org/D55936
llvm-svn: 350005
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/build-vector-128.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/movddup-load-fold.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll | 3 |
3 files changed, 5 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/X86/build-vector-128.ll b/llvm/test/CodeGen/X86/build-vector-128.ll index 1c1dab64047..b80f6fa82d8 100644 --- a/llvm/test/CodeGen/X86/build-vector-128.ll +++ b/llvm/test/CodeGen/X86/build-vector-128.ll @@ -526,8 +526,7 @@ define <4 x float> @PR37502(float %x, float %y) { ; ; SSE41-32-LABEL: PR37502: ; SSE41-32: # %bb.0: -; SSE41-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero -; SSE41-32-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0] +; SSE41-32-NEXT: movddup {{.*#+}} xmm0 = mem[0,0] ; SSE41-32-NEXT: retl ; ; SSE41-64-LABEL: PR37502: @@ -538,8 +537,7 @@ define <4 x float> @PR37502(float %x, float %y) { ; ; AVX-32-LABEL: PR37502: ; AVX-32: # %bb.0: -; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; AVX-32-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX-32-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] ; AVX-32-NEXT: retl ; ; AVX1-64-LABEL: PR37502: diff --git a/llvm/test/CodeGen/X86/movddup-load-fold.ll b/llvm/test/CodeGen/X86/movddup-load-fold.ll index a0e65fb892d..f1af6e9654e 100644 --- a/llvm/test/CodeGen/X86/movddup-load-fold.ll +++ b/llvm/test/CodeGen/X86/movddup-load-fold.ll @@ -9,14 +9,12 @@ define <4 x float> @movddup_load_fold(float %x, float %y) { ; SSE-LABEL: movddup_load_fold: ; SSE: # %bb.0: -; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero -; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0] +; SSE-NEXT: movddup {{.*#+}} xmm0 = mem[0,0] ; SSE-NEXT: retl ; ; AVX-LABEL: movddup_load_fold: ; AVX: # %bb.0: -; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] ; AVX-NEXT: retl %i0 = insertelement <4 x float> zeroinitializer, float %x, i32 0 %i1 = insertelement <4 x float> %i0, float %y, i32 1 diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll index 5fe0a2b460b..37d13d1b2f9 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll @@ -332,8 +332,7 @@ define void @buildvector_v4f32_0404(float %a, float %b, <4 x float>* %ptr) { ; X86AVX2-LABEL: buildvector_v4f32_0404: ; X86AVX2: # %bb.0: ; X86AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; X86AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; X86AVX2-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] ; X86AVX2-NEXT: vmovapd %xmm0, (%eax) ; X86AVX2-NEXT: retl ; |
