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authorDale Johannesen <dalej@apple.com>2010-07-02 20:16:09 +0000
committerDale Johannesen <dalej@apple.com>2010-07-02 20:16:09 +0000
commit4d887f7ca7ce4a43413d68436c4420cfa1cee1b6 (patch)
tree3868b7813f2960006f07a7d42dde054053e0eba0 /llvm/test
parentdf8429aeb40a02b5fa184b141a1f484f010b3eb6 (diff)
downloadbcm5719-llvm-4d887f7ca7ce4a43413d68436c4420cfa1cee1b6.tar.gz
bcm5719-llvm-4d887f7ca7ce4a43413d68436c4420cfa1cee1b6.zip
Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. llvm-svn: 107506
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/Thumb/push.ll2
-rw-r--r--llvm/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll2
-rw-r--r--llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll31
-rw-r--r--llvm/test/CodeGen/X86/inline-asm-tied.ll2
-rw-r--r--llvm/test/CodeGen/X86/iv-users-in-other-loops.ll2
5 files changed, 35 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/Thumb/push.ll b/llvm/test/CodeGen/Thumb/push.ll
index fd05ef4dd76..94ef8e90043 100644
--- a/llvm/test/CodeGen/Thumb/push.ll
+++ b/llvm/test/CodeGen/Thumb/push.ll
@@ -5,6 +5,6 @@ define void @t() nounwind {
; CHECK: t:
; CHECK: push {r7}
entry:
- call void asm sideeffect ".long 0xe7ffdefe", ""() nounwind
+ call void asm sideeffect alignstack ".long 0xe7ffdefe", ""() nounwind
ret void
}
diff --git a/llvm/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll b/llvm/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
index d7b9463b5e1..fcb2ed07dc1 100644
--- a/llvm/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
+++ b/llvm/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 83
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 82
; rdar://6802189
; Test if linearscan is unfavoring registers for allocation to allow more reuse
diff --git a/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll b/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
new file mode 100644
index 00000000000..cb47d208dd4
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+
+define void @foo() nounwind ssp {
+entry:
+; CHECK: foo
+; CHECK: subq $8, %rsp
+; CHECK: int $3
+ call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind
+ call void asm sideeffect alignstack ".file \22small.c\22", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ call void asm sideeffect alignstack ".line 3", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ call void asm sideeffect alignstack "int $$3", "~{dirflag},~{fpsr},~{flags},~{memory}"() nounwind
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @bar() nounwind ssp {
+entry:
+; CHECK: bar
+; CHECK-NOT: subq $8, %rsp
+; CHECK: int $3
+ call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind
+ call void asm sideeffect ".file \22small.c\22", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ call void asm sideeffect ".line 3", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ call void asm sideeffect "int $$3", "~{dirflag},~{fpsr},~{flags},~{memory}"() nounwind
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/llvm/test/CodeGen/X86/inline-asm-tied.ll b/llvm/test/CodeGen/X86/inline-asm-tied.ll
index cfa03bb17ec..79b688551eb 100644
--- a/llvm/test/CodeGen/X86/inline-asm-tied.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-tied.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -regalloc=linearscan | grep {movl %edx, 12(%esp)} | count 2
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -regalloc=linearscan | grep {movl %edx, 4(%esp)} | count 2
; rdar://6992609
target triple = "i386-apple-darwin9.0"
diff --git a/llvm/test/CodeGen/X86/iv-users-in-other-loops.ll b/llvm/test/CodeGen/X86/iv-users-in-other-loops.ll
index 408fb20b8d8..8385a29fa22 100644
--- a/llvm/test/CodeGen/X86/iv-users-in-other-loops.ll
+++ b/llvm/test/CodeGen/X86/iv-users-in-other-loops.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=x86-64 -o %t
; RUN: not grep inc %t
; RUN: grep dec %t | count 2
-; RUN: grep addq %t | count 13
+; RUN: grep addq %t | count 12
; RUN: not grep addb %t
; RUN: not grep leaq %t
; RUN: not grep leal %t
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