[Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0)

The CMPZ #0 disappears during peepholing, leaving just a tADDi3, tADDi8 or t2ADDri. This avoids having to materialize the expensive negative constant in Thumb-1, and allows a shrinking from a 32-bit CMN to a 16-bit ADDS in Thumb-2.

llvm-svn: 281040

5 files changed, 39 insertions, 6 deletions

diff --git a/llvm/test/CodeGen/ARM/lsr-icmp-imm.ll b/llvm/test/CodeGen/ARM/lsr-icmp-imm.ll
index ef98727344e..3c68cc70aa8 100644
--- a/llvm/test/CodeGen/ARM/lsr-icmp-imm.ll
+++ b/llvm/test/CodeGen/ARM/lsr-icmp-imm.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s
-; RUN: llc -mtriple=armv7-apple-ios   -disable-block-placement < %s | FileCheck %s
+; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T
+; RUN: llc -mtriple=armv7-apple-ios   -disable-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-A
 
 ; LSR should compare against the post-incremented induction variable.
 ; In this case, the immediate value is -2 which requires a cmn instruction.
@@ -7,7 +7,8 @@
 ; CHECK-LABEL: f:
 ; CHECK: %for.body
 ; CHECK: sub{{.*}}[[IV:r[0-9]+]], #2
-; CHECK: cmn{{.*}}[[IV]], #2
+; CHECK-T: adds{{.*}}[[IV]], #2
+; CHECK-A: cmn{{.*}}[[IV]], #2
 ; CHECK: bne
 define i32 @f(i32* nocapture %a, i32 %i) nounwind readonly ssp {
 entry:
diff --git a/llvm/test/CodeGen/ARM/select_xform.ll b/llvm/test/CodeGen/ARM/select_xform.ll
index 460ca8f1840..8c1502e1465 100644
--- a/llvm/test/CodeGen/ARM/select_xform.ll
+++ b/llvm/test/CodeGen/ARM/select_xform.ll
@@ -280,7 +280,7 @@ entry:
 ; ARM: and r0, {{r[0-9]+}}, {{r[0-9]+}}
 
 ; T2-LABEL: t18:
-; T2: and.w r0, {{r[0-9]+}}
+; T2: and{{s|.w}} r0, {{r[0-9]+}}
   %cmp = icmp ne i32 %x, 0
   %cond = select i1 %cmp, i32 5, i32 2
   %cmp1 = icmp ne i32 %x, -1
diff --git a/llvm/test/CodeGen/Thumb/cmp-add-fold.ll b/llvm/test/CodeGen/Thumb/cmp-add-fold.ll
new file mode 100644
index 00000000000..b0ad8ab93f8
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb/cmp-add-fold.ll
@@ -0,0 +1,32 @@
+; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK --check-prefix=T1 %s
+; RUN: llc -mtriple=thumbv7m-eabi -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK --check-prefix=T2 %s
+
+; CHECK-LABEL: addri1:
+; CHECK: adds r0, #3
+; T1-NEXT: b{{eq|ne}}
+; T2-NOT: cmp
+define i32 @addri1(i32 %a, i32 %b) {
+  %c = add i32 %a, 3
+  %d = icmp eq i32 %c, 0
+  br i1 %d, label %true, label %false
+
+true:
+  ret i32 4
+false:
+  ret i32 5
+}
+
+; CHECK-LABEL: addri2:
+; CHECK: adds r0, #254
+; T1-NEXT: b{{eq|ne}}
+; T2-NOT: cmp
+define i32 @addri2(i32 %a, i32 %b) {
+  %c = add i32 %a, 254
+  %d = icmp eq i32 %c, 0
+  br i1 %d, label %true, label %false
+
+true:
+  ret i32 4
+false:
+  ret i32 5
+}
diff --git a/llvm/test/CodeGen/Thumb2/lsr-deficiency.ll b/llvm/test/CodeGen/Thumb2/lsr-deficiency.ll
index ccf7faedac6..bd1be6b6f85 100644
--- a/llvm/test/CodeGen/Thumb2/lsr-deficiency.ll
+++ b/llvm/test/CodeGen/Thumb2/lsr-deficiency.ll
@@ -16,7 +16,7 @@ entry:
 bb:                                               ; preds = %bb, %entry
 ; CHECK: LBB0_1:
 ; CHECK: subs [[R2:r[0-9]+]], #1
-; CHECK: cmp.w [[R2]], #-1
+; CHECK: adds {{.*}}, [[R2]], #1
 ; CHECK: bne LBB0_1
 
   %0 = phi i32 [ %.pre, %entry ], [ %3, %bb ]     ; <i32> [#uses=1]
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll b/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll
index 42473c2dcad..fbec7f34a77 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll
@@ -3,7 +3,7 @@
 ; -0x000000bb = 4294967109
 define i1 @f1(i32 %a) {
 ; CHECK-LABEL: f1:
-; CHECK: cmn.w {{r.*}}, #187
+; CHECK: adds {{r.*}}, #187
     %tmp = icmp ne i32 %a, 4294967109
     ret i1 %tmp
 }