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authorColin LeMahieu <colinl@codeaurora.org>2014-12-22 21:40:43 +0000
committerColin LeMahieu <colinl@codeaurora.org>2014-12-22 21:40:43 +0000
commit4b1eac4dda6eb82d4c1bce1a4a1800e36f777c98 (patch)
tree2dce23ad85f0a15f401475458b36cbfb69ffece0 /llvm/test
parent9a6f2836db75968682b3ed98bfe642000bcbd815 (diff)
downloadbcm5719-llvm-4b1eac4dda6eb82d4c1bce1a4a1800e36f777c98.tar.gz
bcm5719-llvm-4b1eac4dda6eb82d4c1bce1a4a1800e36f777c98.zip
[Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
llvm-svn: 224735
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/Hexagon/cext-check.ll4
-rw-r--r--llvm/test/MC/Disassembler/Hexagon/ld.txt12
2 files changed, 14 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Hexagon/cext-check.ll b/llvm/test/CodeGen/Hexagon/cext-check.ll
index 7c4b19e5a40..bad51cf3b94 100644
--- a/llvm/test/CodeGen/Hexagon/cext-check.ll
+++ b/llvm/test/CodeGen/Hexagon/cext-check.ll
@@ -29,9 +29,9 @@ return:
}
define i32 @cext_test2(i8* %a) nounwind {
-; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}+##1023)
+; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}+{{ *}}##1023)
; CHECK: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300000)
-; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}+##1024)
+; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}{{ *}}+{{ *}}##1024)
; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##6000)
entry:
%tobool = icmp ne i8* %a, null
diff --git a/llvm/test/MC/Disassembler/Hexagon/ld.txt b/llvm/test/MC/Disassembler/Hexagon/ld.txt
index aa66245ba92..3dd71eb1ceb 100644
--- a/llvm/test/MC/Disassembler/Hexagon/ld.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/ld.txt
@@ -1,5 +1,17 @@
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+0xf1 0xc3 0x15 0x91
+# CHECK: r17 = memb(r21 + #31)
+0x91 0xdd 0x15 0x41
+# CHECK: if (p3) r17 = memb(r21 + #44)
+0x03 0x40 0x45 0x85 0x91 0xdd 0x15 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memb(r21 + #44)
+0x91 0xdd 0x15 0x45
+# CHECK: if (!p3) r17 = memb(r21 + #44)
+0x03 0x40 0x45 0x85 0x91 0xdd 0x15 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memb(r21 + #44)
0xf1 0xc3 0x35 0x91
# CHECK: r17 = memub(r21 + #31)
0xf1 0xdb 0x35 0x41
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