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| author | Craig Topper <craig.topper@intel.com> | 2019-06-21 18:50:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-06-21 18:50:00 +0000 |
| commit | 4569cdbcf55abf15de2cb15ca55987b3bbd9023c (patch) | |
| tree | 99104dd6249d5b2485d54010de37d2556c6e4846 /llvm/test | |
| parent | 91ea99295ce6cc37f24dd69d79d8eed96f103584 (diff) | |
| download | bcm5719-llvm-4569cdbcf55abf15de2cb15ca55987b3bbd9023c.tar.gz bcm5719-llvm-4569cdbcf55abf15de2cb15ca55987b3bbd9023c.zip | |
[X86] Don't mark v64i8/v32i16 ISD::SELECT as custom unless they are legal types.
We don't have any Custom handling during type legalization. Only
operation legalization.
Fixes PR42355
llvm-svn: 364093
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512-select.ll | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-select.ll b/llvm/test/CodeGen/X86/avx512-select.ll index ed69a48a352..e2f8215d356 100644 --- a/llvm/test/CodeGen/X86/avx512-select.ll +++ b/llvm/test/CodeGen/X86/avx512-select.ll @@ -433,3 +433,107 @@ define <16 x i16> @pr31515(<16 x i1> %a, <16 x i1> %b, <16 x i16> %c) nounwind { ret <16 x i16> %res } +define <32 x i16> @pr42355_v32i16(i1 %c, <32 x i16> %x, <32 x i16> %y) { +; X86-AVX512F-LABEL: pr42355_v32i16: +; X86-AVX512F: # %bb.0: +; X86-AVX512F-NEXT: pushl %ebp +; X86-AVX512F-NEXT: .cfi_def_cfa_offset 8 +; X86-AVX512F-NEXT: .cfi_offset %ebp, -8 +; X86-AVX512F-NEXT: movl %esp, %ebp +; X86-AVX512F-NEXT: .cfi_def_cfa_register %ebp +; X86-AVX512F-NEXT: andl $-32, %esp +; X86-AVX512F-NEXT: subl $32, %esp +; X86-AVX512F-NEXT: testb $1, 8(%ebp) +; X86-AVX512F-NEXT: jne .LBB14_2 +; X86-AVX512F-NEXT: # %bb.1: +; X86-AVX512F-NEXT: vmovaps 40(%ebp), %ymm1 +; X86-AVX512F-NEXT: vmovaps %ymm2, %ymm0 +; X86-AVX512F-NEXT: .LBB14_2: +; X86-AVX512F-NEXT: movl %ebp, %esp +; X86-AVX512F-NEXT: popl %ebp +; X86-AVX512F-NEXT: .cfi_def_cfa %esp, 4 +; X86-AVX512F-NEXT: retl +; +; X64-AVX512F-LABEL: pr42355_v32i16: +; X64-AVX512F: # %bb.0: +; X64-AVX512F-NEXT: testb $1, %dil +; X64-AVX512F-NEXT: jne .LBB14_2 +; X64-AVX512F-NEXT: # %bb.1: +; X64-AVX512F-NEXT: vmovaps %ymm2, %ymm0 +; X64-AVX512F-NEXT: vmovaps %ymm3, %ymm1 +; X64-AVX512F-NEXT: .LBB14_2: +; X64-AVX512F-NEXT: retq +; +; X86-AVX512BW-LABEL: pr42355_v32i16: +; X86-AVX512BW: # %bb.0: +; X86-AVX512BW-NEXT: testb $1, {{[0-9]+}}(%esp) +; X86-AVX512BW-NEXT: jne .LBB14_2 +; X86-AVX512BW-NEXT: # %bb.1: +; X86-AVX512BW-NEXT: vmovaps %zmm1, %zmm0 +; X86-AVX512BW-NEXT: .LBB14_2: +; X86-AVX512BW-NEXT: retl +; +; X64-AVX512BW-LABEL: pr42355_v32i16: +; X64-AVX512BW: # %bb.0: +; X64-AVX512BW-NEXT: testb $1, %dil +; X64-AVX512BW-NEXT: jne .LBB14_2 +; X64-AVX512BW-NEXT: # %bb.1: +; X64-AVX512BW-NEXT: vmovaps %zmm1, %zmm0 +; X64-AVX512BW-NEXT: .LBB14_2: +; X64-AVX512BW-NEXT: retq + %a = select i1 %c, <32 x i16> %x, <32 x i16> %y + ret <32 x i16> %a +} + +define <64 x i8> @pr42355_v64i8(i1 %c, <64 x i8> %x, <64 x i8> %y) { +; X86-AVX512F-LABEL: pr42355_v64i8: +; X86-AVX512F: # %bb.0: +; X86-AVX512F-NEXT: pushl %ebp +; X86-AVX512F-NEXT: .cfi_def_cfa_offset 8 +; X86-AVX512F-NEXT: .cfi_offset %ebp, -8 +; X86-AVX512F-NEXT: movl %esp, %ebp +; X86-AVX512F-NEXT: .cfi_def_cfa_register %ebp +; X86-AVX512F-NEXT: andl $-32, %esp +; X86-AVX512F-NEXT: subl $32, %esp +; X86-AVX512F-NEXT: testb $1, 8(%ebp) +; X86-AVX512F-NEXT: jne .LBB15_2 +; X86-AVX512F-NEXT: # %bb.1: +; X86-AVX512F-NEXT: vmovaps 40(%ebp), %ymm1 +; X86-AVX512F-NEXT: vmovaps %ymm2, %ymm0 +; X86-AVX512F-NEXT: .LBB15_2: +; X86-AVX512F-NEXT: movl %ebp, %esp +; X86-AVX512F-NEXT: popl %ebp +; X86-AVX512F-NEXT: .cfi_def_cfa %esp, 4 +; X86-AVX512F-NEXT: retl +; +; X64-AVX512F-LABEL: pr42355_v64i8: +; X64-AVX512F: # %bb.0: +; X64-AVX512F-NEXT: testb $1, %dil +; X64-AVX512F-NEXT: jne .LBB15_2 +; X64-AVX512F-NEXT: # %bb.1: +; X64-AVX512F-NEXT: vmovaps %ymm2, %ymm0 +; X64-AVX512F-NEXT: vmovaps %ymm3, %ymm1 +; X64-AVX512F-NEXT: .LBB15_2: +; X64-AVX512F-NEXT: retq +; +; X86-AVX512BW-LABEL: pr42355_v64i8: +; X86-AVX512BW: # %bb.0: +; X86-AVX512BW-NEXT: testb $1, {{[0-9]+}}(%esp) +; X86-AVX512BW-NEXT: jne .LBB15_2 +; X86-AVX512BW-NEXT: # %bb.1: +; X86-AVX512BW-NEXT: vmovaps %zmm1, %zmm0 +; X86-AVX512BW-NEXT: .LBB15_2: +; X86-AVX512BW-NEXT: retl +; +; X64-AVX512BW-LABEL: pr42355_v64i8: +; X64-AVX512BW: # %bb.0: +; X64-AVX512BW-NEXT: testb $1, %dil +; X64-AVX512BW-NEXT: jne .LBB15_2 +; X64-AVX512BW-NEXT: # %bb.1: +; X64-AVX512BW-NEXT: vmovaps %zmm1, %zmm0 +; X64-AVX512BW-NEXT: .LBB15_2: +; X64-AVX512BW-NEXT: retq + %a = select i1 %c, <64 x i8> %x, <64 x i8> %y + ret <64 x i8> %a +} + |
