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author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-28 16:04:26 +0000 |
---|---|---|
committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-28 16:04:26 +0000 |
commit | 40ce8af4a5750cb7b35c3bf588b87820a6bb8ce7 (patch) | |
tree | b9119f4ebe3ad7e2774ea3deee6db79bfa87ee8c /llvm/test | |
parent | d99fb956a3c8554a6701d52e1e78f60c21155011 (diff) | |
download | bcm5719-llvm-40ce8af4a5750cb7b35c3bf588b87820a6bb8ce7.tar.gz bcm5719-llvm-40ce8af4a5750cb7b35c3bf588b87820a6bb8ce7.zip |
R600: Move DataLayout to AMDGPUTargetMachine
This is a follow up to r227113.
It is now required to use the amdgcn target for SI and newer GPUs.
llvm-svn: 227316
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/R600/fmax_legacy.f64.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/fmin_legacy.f64.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/fp-classify.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/global-extload-i1.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/global-extload-i16.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/global-extload-i32.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/global-extload-i8.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/hsa.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/inline-asm.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/llvm.AMDGPU.class.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/llvm.sqrt.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/no-shrink-extloads.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/sdivrem64.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/store-barrier.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/trunc-cmp-constant.ll | 4 |
15 files changed, 24 insertions, 24 deletions
diff --git a/llvm/test/CodeGen/R600/fmax_legacy.f64.ll b/llvm/test/CodeGen/R600/fmax_legacy.f64.ll index a615825a45d..762853d46c3 100644 --- a/llvm/test/CodeGen/R600/fmax_legacy.f64.ll +++ b/llvm/test/CodeGen/R600/fmax_legacy.f64.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; Make sure we don't try to form FMAX_LEGACY nodes with f64 declare i32 @llvm.r600.read.tidig.x() #1 diff --git a/llvm/test/CodeGen/R600/fmin_legacy.f64.ll b/llvm/test/CodeGen/R600/fmin_legacy.f64.ll index 51dcd06f939..83043cda53e 100644 --- a/llvm/test/CodeGen/R600/fmin_legacy.f64.ll +++ b/llvm/test/CodeGen/R600/fmin_legacy.f64.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare i32 @llvm.r600.read.tidig.x() #1 diff --git a/llvm/test/CodeGen/R600/fp-classify.ll b/llvm/test/CodeGen/R600/fp-classify.ll index c1de8520310..4fac5176fac 100644 --- a/llvm/test/CodeGen/R600/fp-classify.ll +++ b/llvm/test/CodeGen/R600/fp-classify.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare i1 @llvm.AMDGPU.class.f32(float, i32) #1 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1 diff --git a/llvm/test/CodeGen/R600/global-extload-i1.ll b/llvm/test/CodeGen/R600/global-extload-i1.ll index 5dc494900ce..67d36ce8b5a 100644 --- a/llvm/test/CodeGen/R600/global-extload-i1.ll +++ b/llvm/test/CodeGen/R600/global-extload-i1.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FIXME: Evergreen broken diff --git a/llvm/test/CodeGen/R600/global-extload-i16.ll b/llvm/test/CodeGen/R600/global-extload-i16.ll index a1740ec8236..f3e33128337 100644 --- a/llvm/test/CodeGen/R600/global-extload-i16.ll +++ b/llvm/test/CodeGen/R600/global-extload-i16.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FIXME: cypress is broken because the bigger testcases spill and it's not implemented diff --git a/llvm/test/CodeGen/R600/global-extload-i32.ll b/llvm/test/CodeGen/R600/global-extload-i32.ll index f56b6ac8dc3..b3d543898e5 100644 --- a/llvm/test/CodeGen/R600/global-extload-i32.ll +++ b/llvm/test/CodeGen/R600/global-extload-i32.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}zextload_global_i32_to_i64: diff --git a/llvm/test/CodeGen/R600/global-extload-i8.ll b/llvm/test/CodeGen/R600/global-extload-i8.ll index 86245232d3e..4c37f3f4114 100644 --- a/llvm/test/CodeGen/R600/global-extload-i8.ll +++ b/llvm/test/CodeGen/R600/global-extload-i8.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}zextload_global_i8_to_i32: diff --git a/llvm/test/CodeGen/R600/hsa.ll b/llvm/test/CodeGen/R600/hsa.ll index 5ce3beaa16c..ff75b9083c6 100644 --- a/llvm/test/CodeGen/R600/hsa.ll +++ b/llvm/test/CodeGen/R600/hsa.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=r600--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s +; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s ; HSA: {{^}}simple: ; HSA: .section .hsa.version diff --git a/llvm/test/CodeGen/R600/inline-asm.ll b/llvm/test/CodeGen/R600/inline-asm.ll index 37e4486db38..efc2292de3a 100644 --- a/llvm/test/CodeGen/R600/inline-asm.ll +++ b/llvm/test/CodeGen/R600/inline-asm.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s -; RUN: llc < %s -march=r600 -mcpu=tonga -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK: {{^}}inline_asm: ; CHECK: s_endpgm diff --git a/llvm/test/CodeGen/R600/llvm.AMDGPU.class.ll b/llvm/test/CodeGen/R600/llvm.AMDGPU.class.ll index 974e3c71e62..0bc7d4e6fb5 100644 --- a/llvm/test/CodeGen/R600/llvm.AMDGPU.class.ll +++ b/llvm/test/CodeGen/R600/llvm.AMDGPU.class.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare i1 @llvm.AMDGPU.class.f32(float, i32) #1 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1 diff --git a/llvm/test/CodeGen/R600/llvm.sqrt.ll b/llvm/test/CodeGen/R600/llvm.sqrt.ll index 5888124e6e3..d337bb5495a 100644 --- a/llvm/test/CodeGen/R600/llvm.sqrt.ll +++ b/llvm/test/CodeGen/R600/llvm.sqrt.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK -; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK -; RUN: llc < %s -march=r600 --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=amdgcn --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=amdgcn --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK ; R600-CHECK-LABEL: {{^}}sqrt_f32: ; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z diff --git a/llvm/test/CodeGen/R600/no-shrink-extloads.ll b/llvm/test/CodeGen/R600/no-shrink-extloads.ll index 135d22d3036..30794925fae 100644 --- a/llvm/test/CodeGen/R600/no-shrink-extloads.ll +++ b/llvm/test/CodeGen/R600/no-shrink-extloads.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare i32 @llvm.r600.read.tidig.x() nounwind readnone diff --git a/llvm/test/CodeGen/R600/sdivrem64.ll b/llvm/test/CodeGen/R600/sdivrem64.ll index 425ad28634d..8dc4433dff2 100644 --- a/llvm/test/CodeGen/R600/sdivrem64.ll +++ b/llvm/test/CodeGen/R600/sdivrem64.ll @@ -1,4 +1,4 @@ -;RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s +;RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s ;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s ;FUNC-LABEL: {{^}}test_sdiv: diff --git a/llvm/test/CodeGen/R600/store-barrier.ll b/llvm/test/CodeGen/R600/store-barrier.ll index 350b006ba5e..ea65bb0fb2f 100644 --- a/llvm/test/CodeGen/R600/store-barrier.ll +++ b/llvm/test/CodeGen/R600/store-barrier.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck --check-prefix=CHECK %s -; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck --check-prefix=CHECK %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck --check-prefix=CHECK %s +; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck --check-prefix=CHECK %s ; This test is for a bug in the machine scheduler where stores without ; an underlying object would be moved across the barrier. In this diff --git a/llvm/test/CodeGen/R600/trunc-cmp-constant.ll b/llvm/test/CodeGen/R600/trunc-cmp-constant.ll index 67a9aaffb6f..97af81d821d 100644 --- a/llvm/test/CodeGen/R600/trunc-cmp-constant.ll +++ b/llvm/test/CodeGen/R600/trunc-cmp-constant.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_cmp_eq_0: ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]] |