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| author | Puyan Lotfi <puyan@puyan.org> | 2019-05-31 17:34:25 +0000 |
|---|---|---|
| committer | Puyan Lotfi <puyan@puyan.org> | 2019-05-31 17:34:25 +0000 |
| commit | 3ea6b24f41471358a51134f71177bc7caa2eacfc (patch) | |
| tree | 15e225dc35676497408de876b1d0436978677df9 /llvm/test | |
| parent | 312f3a2bbf45ab2c0cbbbc9ad04fb5d4c0517aaf (diff) | |
| download | bcm5719-llvm-3ea6b24f41471358a51134f71177bc7caa2eacfc.tar.gz bcm5719-llvm-3ea6b24f41471358a51134f71177bc7caa2eacfc.zip | |
[MIR-Canon] Don't do vreg skip for independent instructions if there are none.
We don't want to create vregs if there is nothing to use them for. That causes
verifier errors.
Differential Revision: https://reviews.llvm.org/D62740
llvm-svn: 362247
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir b/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir index abb2dde4d9e..629f7aefd6a 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir @@ -1,4 +1,5 @@ # RUN: llc -march=amdgcn -run-pass=none -verify-machineinstrs -o - %s | FileCheck %s +# RUN: llc -march=amdgcn -run-pass mir-canonicalizer -verify-machineinstrs -o - %s # Previously getReservedRegs was called before parsing # machineFunctionInfo, but the AMDGPU implementation depends on |
