ARM: validate immediate branch targets in AsmParser.

Immediate branch targets aren't commonly used, but if they are we should make
sure they can actually be encoded. This means they must be divisible by 2 when
targeting Thumb mode, and by 4 when targeting ARM mode.

Also do a little naming cleanup while I was changing everything around anyway.

llvm-svn: 275116

4 files changed, 71 insertions, 0 deletions

diff --git a/llvm/test/MC/ARM/arm-branch-errors.s b/llvm/test/MC/ARM/arm-branch-errors.s
new file mode 100644
index 00000000000..0bef3b165a5
--- /dev/null
+++ b/llvm/test/MC/ARM/arm-branch-errors.s
@@ -0,0 +1,16 @@
+@ RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2>&1 | FileCheck %s
+
+@------------------------------------------------------------------------------
+@ Branch targets destined for ARM mode must == 0 (mod 4), otherwise (mod 2).
+@------------------------------------------------------------------------------
+
+        b #2
+        bl #2
+        beq #2
+
+@ CHECK: error: instruction requires: thumb
+@ CHECK:        b #2
+@ CHECK: error: instruction requires: thumb
+@ CHECK:        bl #2
+@ CHECK: error: instruction requires: thumb
+@ CHECK:        beq #2
diff --git a/llvm/test/MC/ARM/arm-branches.s b/llvm/test/MC/ARM/arm-branches.s
new file mode 100644
index 00000000000..4a451114d88
--- /dev/null
+++ b/llvm/test/MC/ARM/arm-branches.s
@@ -0,0 +1,15 @@
+@ RUN: llvm-mc -triple=armv7-apple-darwin -show-encoding < %s | FileCheck %s
+
+@------------------------------------------------------------------------------
+@ Branch targets destined for ARM mode must == 0 (mod 4), otherwise (mod 2).
+@------------------------------------------------------------------------------
+
+        b #4
+        bl #4
+        beq #4
+        blx #2
+
+@ CHECK: b	#4                      @ encoding: [0x01,0x00,0x00,0xea]
+@ CHECK: bl	#4                      @ encoding: [0x01,0x00,0x00,0xeb]
+@ CHECK: beq	#4                      @ encoding: [0x01,0x00,0x00,0x0a]
+@ CHECK: blx	#2                      @ encoding: [0x00,0x00,0x00,0xfb]
diff --git a/llvm/test/MC/ARM/thumb-branch-errors.s b/llvm/test/MC/ARM/thumb-branch-errors.s
new file mode 100644
index 00000000000..82525c15a54
--- /dev/null
+++ b/llvm/test/MC/ARM/thumb-branch-errors.s
@@ -0,0 +1,22 @@
+@ RUN: not llvm-mc -triple=thumbv7-apple-darwin < %s 2>&1 | FileCheck %s
+
+@------------------------------------------------------------------------------
+@ Branch targets destined for ARM mode must == 0 (mod 4), otherwise (mod 2).
+@------------------------------------------------------------------------------
+
+        b #1
+        bl #1
+        cbnz r2, #1
+        beq #1
+        blx #2
+
+@ CHECK: error: branch target out of range
+@ CHECK:         b #1
+@ CHECK: error: invalid operand for instruction
+@ CHECK:         bl #1
+@ CHECK: error: invalid operand for instruction
+@ CHECK:         cbnz r2, #1
+@ CHECK: error: branch target out of range
+@ CHECK:         beq #1
+@ CHECK: error: invalid operand for instruction
+@ CHECK:         blx #2
diff --git a/llvm/test/MC/ARM/thumb2-branches.s b/llvm/test/MC/ARM/thumb2-branches.s
index 9148233a79c..51f01e320d8 100644
--- a/llvm/test/MC/ARM/thumb2-branches.s
+++ b/llvm/test/MC/ARM/thumb2-branches.s
@@ -284,3 +284,21 @@
 @ CHECK: addeq	r0, r1                  @ encoding: [0x08,0x44]
 @ CHECK: bne	#128                    @ encoding: [0x40,0xe0]
 
+
+@------------------------------------------------------------------------------
+@ Branch targets destined for ARM mode must == 0 (mod 4), otherwise (mod 2).
+@------------------------------------------------------------------------------
+
+        b #2
+        bl #2
+        beq #2
+        cbz r0, #2
+        @ N.b. destination is "align(PC, 4) + imm" so imm is still 4-byte
+        @ aligned even though current PC may not and destination must be.
+        blx #4
+
+@ CHECK: b	#2                      @ encoding: [0x01,0xe0]
+@ CHECK: bl	#2                      @ encoding: [0x00,0xf0,0x01,0xf8]
+@ CHECK: beq	#2                      @ encoding: [0x01,0xd0]
+@ CHECK: cbz	r0, #2                  @ encoding: [0x08,0xb1]
+@ CHECK: blx	#4                      @ encoding: [0x00,0xf0,0x02,0xe8]