summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2015-07-30 13:13:09 +0000
committerVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2015-07-30 13:13:09 +0000
commit3d9d81fbb134f507f815845bbec8c754d56bb304 (patch)
treefb640d68bdfa7b2fdfffe7610d39f8b0b593440e /llvm/test
parent1c84ff5f607708b28c93819c8a54f7705ab78db6 (diff)
downloadbcm5719-llvm-3d9d81fbb134f507f815845bbec8c754d56bb304.tar.gz
bcm5719-llvm-3d9d81fbb134f507f815845bbec8c754d56bb304.zip
[mips] Fix out-of-date debug information in test file.
Update the debug info in the check-lines because the change in r243638 introduced a constant initialization before the prologue's end as part of a register spill. llvm-svn: 243640
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/DebugInfo/Mips/delay-slot.ll14
1 files changed, 8 insertions, 6 deletions
diff --git a/llvm/test/DebugInfo/Mips/delay-slot.ll b/llvm/test/DebugInfo/Mips/delay-slot.ll
index bbf749c82ab..df01775a12e 100644
--- a/llvm/test/DebugInfo/Mips/delay-slot.ll
+++ b/llvm/test/DebugInfo/Mips/delay-slot.ll
@@ -13,12 +13,14 @@
; CHECK: Address Line Column File ISA Discriminator Flags
; CHECK: ------------------ ------ ------ ------ --- ------------- -------------
; CHECK: 0x0000000000000000 1 0 1 0 0 is_stmt
-; CHECK: 0x0000000000000000 1 0 1 0 0 is_stmt prologue_end
-; CHECK: 0x0000000000000008 2 0 1 0 0 is_stmt
-; CHECK: 0x0000000000000020 3 0 1 0 0 is_stmt
-; CHECK: 0x0000000000000030 4 0 1 0 0 is_stmt
-; CHECK: 0x0000000000000040 5 0 1 0 0 is_stmt
-; CHECK: 0x0000000000000050 5 0 1 0 0 is_stmt end_sequence
+; FIXME: The next address probably ought to be 0x0000000000000004 but there's
+; a constant initialization before the prologue's end.
+; CHECK: 0x0000000000000008 2 0 1 0 0 is_stmt prologue_end
+; CHECK: 0x0000000000000028 3 0 1 0 0 is_stmt
+; CHECK: 0x0000000000000038 4 0 1 0 0 is_stmt
+; CHECK: 0x0000000000000048 5 0 1 0 0 is_stmt
+; CHECK: 0x0000000000000058 5 0 1 0 0 is_stmt end_sequence
+
target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
target triple = "mips--linux-gnu"
OpenPOWER on IntegriCloud