summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorRoman Lebedev <lebedev.ri@gmail.com>2018-07-18 10:55:17 +0000
committerRoman Lebedev <lebedev.ri@gmail.com>2018-07-18 10:55:17 +0000
commit3cb87e905c033d3bc02599b3ed1728007abbe28a (patch)
treed6f2749883b86422266aba10e2a709c916bc5242 /llvm/test
parent21813140f669e318f1ce5c92c14bbabaffe325c7 (diff)
downloadbcm5719-llvm-3cb87e905c033d3bc02599b3ed1728007abbe28a.tar.gz
bcm5719-llvm-3cb87e905c033d3bc02599b3ed1728007abbe28a.zip
[InstCombine] Re-commit: Fold 'check for [no] signed truncation' pattern
Summary: [[ https://bugs.llvm.org/show_bug.cgi?id=38149 | PR38149 ]] As discussed in https://reviews.llvm.org/D49179#1158957 and later, the IR for 'check for [no] signed truncation' pattern can be improved: https://rise4fun.com/Alive/gBf ^ that pattern will be produced by Implicit Integer Truncation sanitizer, https://reviews.llvm.org/D48958 https://bugs.llvm.org/show_bug.cgi?id=21530 in signed case, therefore it is probably a good idea to improve it. The DAGCombine will reverse this transform, see https://reviews.llvm.org/D49266 This transform is surprisingly frustrating. This does not deal with non-splat shift amounts, or with undef shift amounts. I've outlined what i think the solution should be: ``` // Potential handling of non-splats: for each element: // * if both are undef, replace with constant 0. // Because (1<<0) is OK and is 1, and ((1<<0)>>1) is also OK and is 0. // * if both are not undef, and are different, bailout. // * else, only one is undef, then pick the non-undef one. ``` This is a re-commit, as the original patch, committed in rL337190 was reverted in rL337344 as it broke chromium build: https://bugs.llvm.org/show_bug.cgi?id=38204 and https://crbug.com/864832 Proofs that the fixed folds are ok: https://rise4fun.com/Alive/VYM Differential Revision: https://reviews.llvm.org/D49320 llvm-svn: 337376
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll24
-rw-r--r--llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll24
2 files changed, 20 insertions, 28 deletions
diff --git a/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll b/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
index 2e75ae60571..60aa4d444ca 100644
--- a/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
+++ b/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll
@@ -15,9 +15,8 @@
define i1 @p0(i8 %x) {
; CHECK-LABEL: @p0(
-; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 4
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
; CHECK-NEXT: ret i1 [[TMP2]]
;
%tmp0 = shl i8 %x, 5
@@ -29,9 +28,8 @@ define i1 @p0(i8 %x) {
; Big unusual bit width, https://bugs.llvm.org/show_bug.cgi?id=38204
define i1 @pb(i65 %x) {
; CHECK-LABEL: @pb(
-; CHECK-NEXT: [[TMP0:%.*]] = shl i65 [[X:%.*]], 1
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i65 [[TMP0]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i65 [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i65 [[X:%.*]], 9223372036854775808
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i65 [[TMP1]], -1
; CHECK-NEXT: ret i1 [[TMP2]]
;
%tmp0 = shl i65 %x, 1
@@ -46,9 +44,8 @@ define i1 @pb(i65 %x) {
define <2 x i1> @p1_vec_splat(<2 x i8> %x) {
; CHECK-LABEL: @p1_vec_splat(
-; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 5>
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 5>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 4, i8 4>
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 8, i8 8>
; CHECK-NEXT: ret <2 x i1> [[TMP2]]
;
%tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
@@ -118,9 +115,8 @@ declare i8 @gen8()
define i1 @c0() {
; CHECK-LABEL: @c0(
; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X]], 5
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[X]], [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
; CHECK-NEXT: ret i1 [[TMP2]]
;
%x = call i8 @gen8()
@@ -140,8 +136,8 @@ define i1 @n_oneuse0(i8 %x) {
; CHECK-LABEL: @n_oneuse0(
; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
; CHECK-NEXT: call void @use8(i8 [[TMP0]])
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
; CHECK-NEXT: ret i1 [[TMP2]]
;
%tmp0 = shl i8 %x, 5
diff --git a/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll b/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
index 6cd32db8224..90d19be434f 100644
--- a/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
+++ b/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll
@@ -15,9 +15,8 @@
define i1 @p0(i8 %x) {
; CHECK-LABEL: @p0(
-; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 4
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
; CHECK-NEXT: ret i1 [[TMP2]]
;
%tmp0 = shl i8 %x, 5
@@ -29,9 +28,8 @@ define i1 @p0(i8 %x) {
; Big unusual bit width, https://bugs.llvm.org/show_bug.cgi?id=38204
define i1 @pb(i65 %x) {
; CHECK-LABEL: @pb(
-; CHECK-NEXT: [[TMP0:%.*]] = shl i65 [[X:%.*]], 1
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i65 [[TMP0]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i65 [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i65 [[X:%.*]], 9223372036854775808
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i65 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TMP2]]
;
%tmp0 = shl i65 %x, 1
@@ -46,9 +44,8 @@ define i1 @pb(i65 %x) {
define <2 x i1> @p1_vec_splat(<2 x i8> %x) {
; CHECK-LABEL: @p1_vec_splat(
-; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 5>
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 5>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 4, i8 4>
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt <2 x i8> [[TMP1]], <i8 7, i8 7>
; CHECK-NEXT: ret <2 x i1> [[TMP2]]
;
%tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
@@ -118,9 +115,8 @@ declare i8 @gen8()
define i1 @c0() {
; CHECK-LABEL: @c0(
; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X]], 5
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[X]], [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
; CHECK-NEXT: ret i1 [[TMP2]]
;
%x = call i8 @gen8()
@@ -140,8 +136,8 @@ define i1 @n_oneuse0(i8 %x) {
; CHECK-LABEL: @n_oneuse0(
; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
; CHECK-NEXT: call void @use8(i8 [[TMP0]])
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
; CHECK-NEXT: ret i1 [[TMP2]]
;
%tmp0 = shl i8 %x, 5
OpenPOWER on IntegriCloud