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| author | Tim Northover <tnorthover@apple.com> | 2014-07-14 11:16:02 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-07-14 11:16:02 +0000 |
| commit | 3cb24110b19b03de8ec628ea10a80320e6b70314 (patch) | |
| tree | d26611c761215c976844aa3ecdd7f06c3bd4d6b3 /llvm/test | |
| parent | 9ee2aee85962b453801a06eac3258595f193ec4a (diff) | |
| download | bcm5719-llvm-3cb24110b19b03de8ec628ea10a80320e6b70314.tar.gz bcm5719-llvm-3cb24110b19b03de8ec628ea10a80320e6b70314.zip | |
AArch64: remove unnecessary pseudo-instruction.
Sufficiently twisted use of TableGen lets us write patterns directly for f16
(as an i16 promoted to i32) -> f32 conversion.
llvm-svn: 212933
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll b/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll index d24495844b4..cad8353a156 100644 --- a/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll +++ b/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll @@ -72,8 +72,8 @@ define i16 @to_half(float %in) { define float @from_half(i16 %in) { ; CHECK-LABEL: from_half: -; CHECK: fmov s[[HALFVAL:[0-9]+]], {{w[0-9]+}} -; CHECK: fcvt s0, h[[HALFVAL]] +; CHECK: fmov {{s[0-9]+}}, {{w[0-9]+}} +; CHECK: fcvt s0, {{h[0-9]+}} %res = call float @llvm.convert.from.fp16(i16 %in) ret float %res } |
