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| author | Diana Picus <diana.picus@linaro.org> | 2016-12-19 14:07:50 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2016-12-19 14:07:50 +0000 |
| commit | 36aa09fa3c45038c832ccd952a6972f89922ea16 (patch) | |
| tree | 423f242572d38303725be26fa5621ebad95abd31 /llvm/test | |
| parent | b6945e33017b01a60977a76cf816625398851234 (diff) | |
| download | bcm5719-llvm-36aa09fa3c45038c832ccd952a6972f89922ea16.tar.gz bcm5719-llvm-36aa09fa3c45038c832ccd952a6972f89922ea16.zip | |
[ARM] GlobalISel: Select i8 and i16 copies
Teach the instruction selector that it's ok to copy small values from physical
registers.
First part of https://reviews.llvm.org/D27704
llvm-svn: 290104
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir | 63 |
1 files changed, 60 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir index 22ae8fcd5aa..134ced6215c 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir @@ -1,11 +1,68 @@ # RUN: llc -O0 -mtriple arm-- -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --- | - define void @test_adds32() { ret void } + define void @test_add_s8() { ret void } + define void @test_add_s16() { ret void } + define void @test_add_s32() { ret void } + define void @test_load_from_stack() { ret void } ... --- -name: test_adds32 -# CHECK-LABEL: name: test_adds32 +name: test_add_s8 +# CHECK-LABEL: name: test_add_s8 +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } + - { id: 1, class: gprb } + - { id: 2, class: gprb } +# CHECK-DAG: id: 0, class: gpr +# CHECK-DAG: id: 1, class: gpr +# CHECK-DAG: id: 2, class: gpr +body: | + bb.0: + liveins: %r0, %r1 + + %0(s8) = COPY %r0 + ; CHECK: [[VREGX:%[0-9]+]] = COPY %r0 + + %r0 = COPY %0(s8) + ; CHECK: %r0 = COPY [[VREGX]] + + BX_RET 14, _, implicit %r0 + ; CHECK: BX_RET 14, _, implicit %r0 +... +--- +name: test_add_s16 +# CHECK-LABEL: name: test_add_s16 +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } + - { id: 1, class: gprb } + - { id: 2, class: gprb } +# CHECK-DAG: id: 0, class: gpr +# CHECK-DAG: id: 1, class: gpr +# CHECK-DAG: id: 2, class: gpr +body: | + bb.0: + liveins: %r0, %r1 + + %0(s16) = COPY %r0 + ; CHECK: [[VREGX:%[0-9]+]] = COPY %r0 + + %r0 = COPY %0(s16) + ; CHECK: %r0 = COPY [[VREGX]] + + BX_RET 14, _, implicit %r0 + ; CHECK: BX_RET 14, _, implicit %r0 +... +--- +name: test_add_s32 +# CHECK-LABEL: name: test_add_s32 legalized: true regBankSelected: true selected: false |
