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authorEvan Cheng <evan.cheng@apple.com>2009-10-22 06:48:32 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-10-22 06:48:32 +0000
commit3615b9bef3d71e602689ddeb74465069385b5fb6 (patch)
treeba7c52a6f9272a08ac24682f5ecc4bff081d2fb5 /llvm/test
parent943f4f41f2551a33fcce2cee2373ed6d178ebbdd (diff)
downloadbcm5719-llvm-3615b9bef3d71e602689ddeb74465069385b5fb6.tar.gz
bcm5719-llvm-3615b9bef3d71e602689ddeb74465069385b5fb6.zip
Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
llvm-svn: 84843
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/ifcvt5.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/ifcvt5.ll b/llvm/test/CodeGen/ARM/ifcvt5.ll
index e9145ac36dd..92bbe75baac 100644
--- a/llvm/test/CodeGen/ARM/ifcvt5.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt5.ll
@@ -11,7 +11,8 @@ entry:
define void @t1(i32 %a, i32 %b) {
; CHECK: t1:
-; CHECK: ldmltfd sp!, {r7, pc}
+; CHECK: movge
+; CHECK: blge _foo
entry:
%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
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